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ISL29030IROZ-T7 Datasheet(PDF) 9 Page - Intersil Corporation |
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ISL29030IROZ-T7 Datasheet(HTML) 9 Page - Intersil Corporation |
9 / 17 page ISL29030 9 FN6872.1 November 12, 2012 Principles of Operation I2C Interface The ISL29030’s I2C interface slave address is internally hardwired as 0b1000100. Figure 2 shows a sample one-byte read. The I2C bus master always drives the SCL (clock) line, while either the master or the slave can drive the SDA (data) line. Every I2C transaction begins with the master asserting a start condition (SDA falling while SCL remains high). The first transmitted byte is initiated by the master and includes 7 address bits and a R/W bit. The slave is responsible for pulling SDA low during the ACK bit after every transmitted byte. Each I2C transaction ends with the master asserting a stop condition (SDA rising while SCL remains high). For more information about the I2C standard, please consult the Philips™ I2C specification documents. Photodiodes and ADCs The ISL29030 contains two photodiode arrays which convert photons (light) into current. The ALS photodiodes are constructed to mimic the human eye’s wavelength response curve to visible light (see Figure 7). The ALS photodiodes’ current output is digitized by a 12-bit ADC in 100ms. These 12 bits can be accessed by reading from I2C registers 0x9 and 0xA when the ADC conversion is completed. The ALS converter is a charge-balancing integrating 12-bit ADC. Charge-balancing is best for converting small current signals in the presence of periodic AC noise. Integrating over 100ms highly rejects both 50Hz and 60Hz light flicker by picking the lowest integer number of cycles for both 50Hz/60Hz frequencies. FIGURE 2. I2C DRIVER TIMING DIAGRAM FOR MASTER AND SLAVE CONNECTED TO COMMON BUS START W A A A6 A5 A4 A3 A2 A1 A0 W A R7 R6 R5 R4 R3 R2 R1 R0 A A6 A5 A4 A3 A2 A1 A0 W A A A A D7 D6 D5 D4 D3D2 D1D0 13 5 7 13 57 12 3 4 5 6 9 2 4 6 STOP START SDA DRIVEN BY MASTER DEVICE ADDRESS SDA DRIVEN BY ISL29030 DATA BYTE0 REGISTER ADDRESS SLAVE DEVICE ADDRESS I2C DATA SDA DRIVEN BY MASTER SDA DRIVEN BY MASTER 24 68 9 2 468 9 7 8 1 357 8 9 I2C SDA I2C SDA I2C CLK MASTER (ISL29030) |
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