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TC1142-30EUA Datasheet(PDF) 4 Page - Microchip Technology |
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TC1142-30EUA Datasheet(HTML) 4 Page - Microchip Technology |
4 / 12 page TC1142 DS21360B-page 4 2002 Microchip Technology Inc. 3.0 DETAILED DESCRIPTION The TC1142 inductorless -2x boost/buck regulator is an inverting charge pump that uses a pulse-frequency modulation (PFM) control scheme to produce a regulated negative output voltage, -VR, between -3V and -5V (depending on the output voltage option) at 20mA maximum load. Output voltage regulation is achieved by gating ON the clock to the charge pump for a single half-clock period whenever the output is more positive than VR, and gating it OFF when the output is more negative than -VR. The resulting PFM of the clock applied to the charge pump has a high frequency spectral content consisting only of clock harmonics. When using an external clock, the transient noise is then synchronized to the clock and is easier to filter in sensitive applications. The TC1142 also can be used as a -1x boost/buck regulator by omitting the C2 capacitor and connecting the C2– pin to VOUT. The PFM control scheme minimizes supply current at small loads and permits the use of low value flying capacitors, which saves on printed circuit board space and cost. Due to the TC1142’s doubling and inverting charge pump mechanism, the output voltage is limited to -2VIN. To produce a -5V regulated output, for example, a minimum input voltage of 2.5V is required at VIN. The CCLK pin of the TC1142 has three functions: It can select the internal 200kHz oscillator (when held HIGH), put the TC1142 into shutdown (when held LOW), or provide an external clock input. To achieve this functionality, an internal counter is reset by any positive transition at the CCLK pin, but will time out in typically 160 µsec (i.e., a frequency higher than about 3kHz). If the counter times out following the last positive transition, then the internal clock will be gated through to the charge pump if CCLK is HIGH, or the device will enter shutdown mode if it is LOW. To enter shutdown, CCLK must be LOW and the counter must have timed out. These timing diagrams are shown in Figure 3-4. A functional circuit diagram of the TC1142 is shown in Figure 3-1. The output voltage VOUT is compared to an on-chip reference voltage, and the comparator output is used to gate the charge pump clock. The charge pump is a negative voltage doubler and has two phases of operation which are further illustrated in Figure 3-2 and Figure 3-3. In phase 1, shown in Figure 3-2, the flying capacitor C1 charges the flying capacitor C2 while the device load is totally serviced by the charge stored on the reservoir capacitor COUT. In phase 2, shown in Figure 3-3, the capacitor C1 is recharged to VIN while the capacitor C2 transfers its charge to the reservoir capacitor COUT. In normal operation, the TC1142 charge pump stays in phase 2 and only switches to phase 1 as required to maintain output voltage regulation. FIGURE 3-1: FUNCTIONAL CIRCUIT DIAGRAM VIN C1+ C1– C2+ C2– + COUT VOUT + – 1.2V + Clock Circuit OSC Override Shutdown VIN |
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