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TC7126ACKW Datasheet(PDF) 11 Page - Microchip Technology |
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TC7126ACKW Datasheet(HTML) 11 Page - Microchip Technology |
11 / 22 page © 2002 Microchip Technology Inc. DS21458B-page 11 TC7126/A 5.1 System Timing The oscillator frequency is divided by four prior to clocking the internal decade counters. The four-phase measurement cycle takes a total of 4000 counts (16,000 clock pulses). The 4000-count cycle is inde- pendent of input signal magnitude. Each phase of the measurement cycle has the following length: 1. Auto-Zero Phase: 1000 to 3000 counts (4000 to 12,000 clock pulses). For signals less than full scale, the auto-zero phase is assigned the unused reference integrate time period. 2. Signal Integrate: 1000 counts (4000 clock pulses). This time period is fixed. The integration period is: EQUATION 5-1: 3. Reference Integrate: 0 to 2000 counts (0 to 8000 clock pulses). The TC7126A is a drop-in replacement for the TC7126 and ICL7126, which offer a greatly improved internal reference temperature coefficient. No external compo- nent value changes are required to upgrade existing designs. 6.0 COMPONENT VALUE SELECTION 6.1 Auto-Zero Capacitor (CAZ) The CAZ capacitor size has some influence on system noise. A 0.47 µF capacitor is recommended for 200mV full scale applications where 1LSB is 100 µV. A 0.033µF capacitor is adequate for 2.0V full scale applications. A mylar type dielectric capacitor is adequate. 6.2 Reference Voltage Capacitor (CREF) The reference voltage, used to ramp the integrator out- put voltage back to zero during the reference integrate phase, is stored on CREF.A 0.1µF capacitor is accept- able when VREF- is tied to analog common. If a large Common mode voltage exists (VREF- – analog com- mon) and the application requires a 200mV full scale, increase CREF to 1µF. Rollover error will be held to less than 0.5 count. A Mylar type dielectric capacitor is adequate. 6.3 Integrating Capacitor (CINT) CINT should be selected to maximize integrator output voltage swing without causing output saturation. Due to the TC7126A's superior analog common temperature coefficient specification, analog common will normally supply the differential voltage reference. For this case, a ±2V full scale integrator output swing is satisfactory. For 3 readings per second (FOSC = 48kHz), a 0.047µF value is suggested. For 1 reading per second, 0.15 µF is recommended. If a different oscillator frequency is used, CINT must be changed in inverse proportion to maintain the nominal ±2V integrator swing. An exact expression for CINT is: EQUATION 6-1: At 3 readings per second, a 750 Ω resistor should be placed in series with CINT. This increases accuracy by compensating for comparator delay. CINT must have low dielectric absorption to minimize rollover error. A polypropylene capacitor is recommended. 6.4 Integrating Resistor (RINT) The input buffer amplifier and integrator are designed with Class A output stages. The output stage idling cur- rent is 6µA. The integrator and buffer can supply 1µA drive current with negligible linearity errors. RINT is cho- sen to remain in the output stage linear drive region, but not so large that PC board leakage currents induce errors. For a 200mV full scale, RINT is 180kΩ.A 2V full scale requires 1.8M Ω. Note: FOSC = 48kHz (3 readings per sec). TSI = 4000 1 FOSC Where: FOSC is the externally set clock frequency. Component Value Nominal Full Scale Voltage 200mV 2V CAZ 0.33 µF 0.033 µF RINT 180k Ω 1.8M Ω CINT 0.047 µF 0.047 µF CINT = (4000) 1 FOSC VFS RINT VINT Where: FOSC = Clock frequency at Pin 38 VFS = Full scale input voltage RINT = Integrating resistor VINT = Desired full scale integrator output swing |
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