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TPS51312 Datasheet(PDF) 9 Page - Texas Instruments |
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TPS51312 Datasheet(HTML) 9 Page - Texas Instruments |
9 / 21 page ILOAD VC – VCS PWM VFB –VREF UDG-12115 IL VFB–VREF VC – VCS PWM IL VOUT tON PWM delay ~100 ns UDG-12114 TPS51312 www.ti.com SLUSB57 – SEPTEMBER 2012 Fast Feedforward Loop (C) Loop C is the additional loop that acts a direct fast feedforward loop to enhance the transient response. In steady state operation as shown in Figure 10, the on time is initiated by the interaction of the three loops mentioned above. When the (VC– VCS) is rising above threshold defined by (VFB – VREF), the PWM comparator issues the on time pulse after the propagation delay. The demand of on time occurs when the artificial current has reached the valley point. The load regulation is maintained by the integrator provided by the gM amplifier and integrator. In transient operation as shown in Figure 11, the benefit of this topology is becoming evident. In an all MLCC output configuration, especially when the output capacitance is low, when the load step is applied, the output voltage is immediately discharged to try to keep the load demand. The immediate reflection of the load demand is instantly reflected in the FB voltage. The (VFB – VREF) is thus served as a termination voltage level for the (VC – VCS), thus modulating the initiation of the on time. The transient response can be improved further by amplifying the difference between VFB and the VREF reference. Figure 10. Steady-State Operation Figure 11. Transient Operation PWM Frequency The TPS51312 operates at a switching frequency of 900 kHz. Light Load Power Saving Features The TPS51312 offers an automatic pulse-skipping feature to provide excellent efficiency over the entire load range. The converter senses the current during low side FET on and prevents negative current flow by turning off the low side FET. This saves power by eliminating re-circulation of the inductor current. When the bottom FET is turned off, the converter enters discontinuous mode, and the switching frequency decreases, reducing switching loss. Power Sequences TPS51312 initiates the soft-start process when the EN, VIN and VCC pins are ready. The soft-start time 300 µs when the reference voltage is between 0 V and 0.6 V (VREF). The actual voltage ramp up time is the same as that of the VREF start-up time, which is 300 µs. Power Good Signal The TPS51312 has one open-drain power good (PGOOD) pin. During initial startup, there is a 1.3-ms power good high propagation delay after EN goes high. The PGOOD de-asserts when the EN is pulled low or an undervoltage condition on VCC or VIN or any other faults (such as VOUT, UVP, OCP, OVP) that require latch off action is detected. Protection Features The TPS51312 offers many features to protect the converter power chain as well as the system electronics. Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links :TPS51312 |
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