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SN74LSXXXD Datasheet(PDF) 5 Page - ON Semiconductor |
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SN74LSXXXD Datasheet(HTML) 5 Page - ON Semiconductor |
5 / 7 page SN74LS192 http://onsemi.com 5 AC CHARACTERISTICS (TA = 25°C) Symbol Parameter Limits Unit Test Conditions Min Typ Max fMAX Maximum Clock Frequency 25 32 MHz VCC = 5.0 V CL = 15 pF tPLH tPHL CPU Input to TCU Output 17 18 26 24 ns tPLH tPHL CPD Input to TCD Output 16 15 24 24 ns tPLH tPHL Clock to Q 27 30 38 47 ns tPLH tPHL PL to Q 24 25 40 40 ns tPHL MR Input to Any Output 23 35 ns AC SETUP REQUIREMENTS (TA = 25°C) Symbol Parameter Limits Unit Test Conditions Min Typ Max tW Any Pulse Width 20 ns VCC = 5.0 V ts Data Setup Time 20 ns th Data Hold Time 5.0 ns trec Recovery Time 40 ns DEFINITIONS OF TERMS SETUP TIME (ts) is defined as the minimum time required for the correct logic level to be present at the logic input prior to the PL transition from LOW-to-HIGH in order to be recognized and transferred to the outputs. HOLD TIME (th) is defined as the minimum time following the PL transition from LOW-to-HIGH that the logic level must be maintained at the input in order to ensure continued recognition. A negative HOLD TIME indicates that the correct logic level may be released prior to the PL transition from LOW-to-HIGH and still be recognized. RECOVERY TIME (trec) is defined as the minimum time required between the end of the reset pulse and the clock transition from LOW-to-HIGH in order to recognize and transfer HIGH data to the Q outputs. |
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