SN74LS161A, SN74LS163A

http://onsemi.com

6

Figure 3.

OTHER CONDITIONS: CP = PE = CEP = MR = H

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1.3 V

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CET

TC

AC WAVEFORMS (continued)

The positive TC pulse is coincident with the output state

Figure 4.

OTHER CONDITIONS: PE = CEP = CET = MR = H

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1.3 V

1.3 V

CP

TC

The shaded areas indicate when the input is permitted to

change for predictable output performance.

Figure 5.

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1.3 V

OTHER CONDITIONS: PE = L, MR = H

CP

1.3 V

1.3 V

1.3 V

OTHER CONDITIONS: PE = H, MR = H

1.3 V

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COUNT

HOLD

HOLD

CEP

CP

CET

Q

CP

SR or PE

Q RESPONSE TO PE

RESET

COUNT OR LOAD

Q RESPONSE TO SR

PARALLEL LOAD

(See Fig. 5)

COUNT MODE

(See Fig. 7)

(L) = 0

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1.3 V

Figure 6.

COUNT ENABLE TRICKLE INPUT

TO TERMINAL COUNT OUTPUT DELAYS

CLOCK TO TERMINAL COUNT DELAYS

FOR PARALLEL DATA INPUTS

COUNT ENABLE (CEP) AND (CET) AND

PARALLEL ENABLE (PE) INPUTS

Figure 7.

The shaded areas indicate when the input is permitted to

change for predictable output performance.

1.3 V