TMP100-Q1

TMP101-Q1

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SBOS581

– SEPTEMBER 2011

Table 4. Byte 2 of Temperature Register

D7

D6

D5

D4

D3

D2

D1

D0

T3

T2

T1

T0

0

0

0

0

Table 5. Temperature Data Format

DIGITAL OUTPUT

TEMPERATURE (

°C)

HEX

(BINARY)

128

0111 1111 1111

7FF

127.9375

0111 1111 1111

7FF

100

0110 0100 0000

640

80

0101 0000 0000

500

75

0100 1011 0000

4B0

50

0011 0010 0000

320

25

0001 1001 0000

190

0.25

0000 0000 0100

004

0.0

0000 0000 0000

000

−0.25

1111 1111 1100

FFC

−25

1110 0111 0000

E70

−55

1100 1001 0000

C90

−128

1000 0000 0000

800

The user can obtain 9, 10, 11, or 12 bits of resolution by addressing the Configuration Register and setting the

resolution bits accordingly. For 9-, 10-, or 11-bit resolution, the most significant bits in the Temperature Register

are used with the unused LSBs set to zero.

CONFIGURATION REGISTER

The Configuration Register is an 8-bit read/write register used to store bits that control the operational modes of

the temperature sensor. Read/write operations are performed MSB first. The format of the Configuration Register

for the TMP100-Q1 and TMP101-Q1 is shown in Table 6, followed by a breakdown of the register bits. The

power-up/reset value of the Configuration Register is all bits equal to 0. The OS/ALERT bit will read as 1 after

power-up/reset.

Table 6. Configuration Register Format

BYTE

D7

D6

D5

D4

D3

D2

D1

D0

OS/

1

R1

R0

F1

F0

POL

TM

SD

ALERT

SHUTDOWN MODE (SD)

The Shutdown Mode of the TMP100-Q1 and TMP101-Q1 allows the user to save maximum power by shutting

down all device circuitry other than the serial interface, which reduces current consumption to less than 1

μA. For

the TMP100-Q1 and TMP101-Q1, Shutdown Mode is enabled when the SD bit is 1. The device will shutdown

once the current conversion is completed. For SD equal to 0, the device will maintain continuous conversion.

THERMOSTAT MODE (TM)

The Thermostat Mode bit of the TMP101-Q1 indicates to the device whether to operate in Comparator Mode (TM

= 0) or Interrupt Mode (TM = 1). For more information on comparator and interrupt modes, see the HIGH and

LOW Limit Registers section.

POLARITY (POL)

The Polarity Bit of the TMP101-Q1 allows the user to adjust the polarity of the ALERT pin output. If POL = 0, the

ALERT pin will be active LOW, as shown in Figure 9. For POL = 1 the ALERT pin will be active HIGH, and the

state of the ALERT pin is inverted.

Copyright

© 2011, Texas Instruments Incorporated

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