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CDCL1810RGZRG4 Datasheet(PDF) 11 Page - Texas Instruments |
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CDCL1810RGZRG4 Datasheet(HTML) 11 Page - Texas Instruments |
11 / 33 page power up POR verifies input supply Load register defaults Reload all divider settings; Reset all dividers Enable all selected output banks Device active (normal mode) Disable all outputs I2C register write command? no yes CDCL1810 www.ti.com SLLS781D – FEBRUARY 2007 – REVISED NOVEMBER 2014 9.3 Feature Description 9.3.1 Output Enable/Disable The CDCL1810 does not require external output synchronization. Instead the device incorporates a scheme which ensures the output dividers are reset and time synchronized after every write action into the I2C programmable register space. Figure 5. Device Status Flow Chart Copyright © 2007–2014, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: CDCL1810 |
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