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TMP815PWR Datasheet(PDF) 9 Page - Texas Instruments |
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TMP815PWR Datasheet(HTML) 9 Page - Texas Instruments |
9 / 20 page TMP815 www.ti.com SLDS153B – MAY 2009 – REVISED NOVEMBER 2015 Feature Description (continued) 7.3.3 Lock Detection When the rotor is locked by external means or load conditions, The lock detection feature helps to protect the circuit by not allowing the current to rise beyond control. A hiccup mechanism is also provided. The lock detection is enabled by a connection to the lock detection capacitor (see *10 in Figure 5) The constant current charge and discharge circuits cause drive stop when the pin voltage rises to 3 V and unlocking the drive when pin voltage falls to 1.1 V. If lock detection feature is not desired in the application, this pin needs to be connected to ground. 7.3.4 Current Limit Current limit resistor is connected in a return path of H Bridge connection. This input is connected to the SENSE pin where the Current is limited when the voltage across this resistor crosses 200-mV threshold. The device enters in lower regeneration mode (see *8 in Figure 5) If not used, this pin needs to be connected to ground. 7.3.5 Minimum Speed Setting Minimum speed setting (see *6 in Figure 5) feature is use with the RMI pin in the device. Connect to 5VREG with a pullup resistor if not used. 7.3.6 Speed Output The speed of the motor while running can be observed at the FG pin which is an open collector output and needs to be pulled high for using it. 7.3.7 Drive Frequency Selection The P channel switches in the device are switched with higher frequency whose duty cycle is decided by the speed control input. The frequency of the operation can be decided by the capacitor connected at the CPWM pin. As this is used also for the current limiting canceling signal, be sure to connect the capacitor even when speed control is not used. 7.4 Device Functional Modes Table 1. Drive Lock Truth Table (1) (2) IN– IN+ CT OUT1P OUT1N OUT2P OUT2N FG MODE H L L L L OFF H L OUT1 → 2 drive L H L OFF H L L OFF OUT2 → 1 drive H L H OFF L OFF H L Lock protection L H H OFF H OFF L OFF (1) For VTH, RMI, and S-S pins, see Figure 2. (2) CPWM = H, VTH = RMI = S-S = L Table 2. Speed Control Truth Table (1) (2) VTH, RMI CPWM IN– IN+ OUT1P OUT1N OUT2P OUT2N MODE L H H L L L OFF H OUT1 → 2 Drive L H L H OFF H L L OUT2 → 1 Drive H L H L OFF L OFF H Regeneration mode H L L H OFF H OFF L (1) For VTH, RMI, and S-S pins, see Figure 2. (2) CT = S-S = L Copyright © 2009–2015, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: TMP815 |
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