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SN74HC74PW Datasheet(PDF) 10 Page - Texas Instruments |
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SN74HC74PW Datasheet(HTML) 10 Page - Texas Instruments |
10 / 15 page PRE CLK D CLR Q Q C C C C C C C C C C TG TG TG TG SN54HC74, SN74HC74 SCLS094E – DECEMBER 1982 – REVISED DECEMBER 2015 www.ti.com 8 Detailed Description 8.1 Overview Figure 3 describes the SNx4HC74 devices. As the SNx4HC74 is a dual D-Type positive-edge-triggered flip-flop with clear and preset, the diagram below describes one of the two device flip-flops. 8.2 Functional Block Diagram Figure 3. Logic Diagram (Positive Logic) 8.3 Feature Description The SNx4HC74 inputs accept voltage levels up to 5.5 V. Refer to the Recommended Operating Conditions for appropriate input high and low logic levels. 8.4 Device Functional Modes Table 1 lists the functional modes of the SNx4HC74. Table 1. Function Table INPUTS OUTPUTS PRE CLR CLK D Q Q L H X X H L H L X X L H L L X X H(1) H(1) H H ↑ H H L H H ↑ L L H H H L X Q0 Q0 (1) This configuration is nonstable; that is, it does not persist when PRE or CLR returns to its inactive (high) level. 10 Submit Documentation Feedback Copyright © 1982–2015, Texas Instruments Incorporated Product Folder Links: SN54HC74 SN74HC74 |
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