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TC78H610FNG Datasheet(PDF) 9 Page - Toshiba Semiconductor |
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TC78H610FNG Datasheet(HTML) 9 Page - Toshiba Semiconductor |
9 / 16 page TC78H610FNG 2014-3-24 9 Explanation of operation to H-Bridge To prevent shoot-through current caused by simultaneous conduction of upper and lower transistors in the output stage, a dead time is internally generated when switching the upper and lower transistors. Therefore, synchronous rectification for high efficiency in control can be achieved without an off-time that is generated via an external input. A dead time (t2, t4) is a reference value. IN1A=H,IN2A=L t5 VM M GND AO1 VM M GND IN1A=H,IN2A=H t3 AO1 VM M GND IN1A=H,IN2A=L t1 AO1 VM M GND IN1A=H,IN2A=L → IN1A=H,IN2A=H t2 = 300 ns (Typ.) AO1 VM M GND IN1A=H,IN2A=H → IN1A=H,IN2A=L t4 = 300 ns (Typ.) AO1 GND VM Output Voltage (AO1) t1 t2 t3 t5 t4 |
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