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CD4051BMJ Datasheet(PDF) 1 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
No. de pieza CD4051BMJ
Descripción Electrónicos  Single 8-Channel, Dual 4-Channel, Triple 2-Channel Analog Multiplexer/Demultiplexe
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Fabricante Electrónico  NSC [National Semiconductor (TI)]
Página de inicio  http://www.national.com
Logo NSC - National Semiconductor (TI)

CD4051BMJ Datasheet(HTML) 1 Page - National Semiconductor (TI)

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TLF5662
October 1989
CD4051BMCD4051BC Single 8-Channel Analog
MultiplexerDemultiplexer
CD4052BMCD4052BC Dual 4-Channel Analog
MultiplexerDemultiplexer
CD4053BMCD4053BC Triple 2-Channel Analog
MultiplexerDemultiplexer
General Description
These analog multiplexersdemultiplexers are digitally con-
trolled analog switches having low ‘‘ON’’ impedance and
very low ‘‘OFF’’ leakage currents Control of analog signals
up to 15Vp-p can be achieved by digital signal amplitudes of
3 – 15V For example if VDDe5V VSSe0V and VEEeb5V
analog signals from b5V to a5V can be controlled by digi-
tal inputs of 0 – 5V The multiplexer circuits dissipate ex-
tremely low quiescent power over the full VDDbVSS and
VDDbVEE supply voltage ranges independent of the logic
state of the control signals When a logical ‘‘1’’ is present at
the inhibit input terminal all channels are ‘‘OFF’’
CD4051BMCD4051BC is a single 8-channel multiplexer
having three binary control inputs A B and C and an inhibit
input The three binary signals select 1 of 8 channels to be
turned ‘‘ON’’ and connect the input to the output
CD4052BMCD4052BC is a differential 4-channel multiplex-
er having two binary control inputs A and B and an inhibit
input The two binary input signals select 1 or 4 pairs of
channels to be turned on and connect the differential ana-
log inputs to the differential outputs
CD4053BMCD4053BC is a triple 2-channel multiplexer
having three separate digital control inputs A B and C and
an inhibit input Each control input selects one of a pair of
channels which are connected in a single-pole double-throw
configuration
Features
Y
Wide range of digital and analog signal levels digital
3 – 15V analog to 15Vp-p
Y
Low ‘‘ON’’ resistance 80X (typ) over entire 15Vp-p sig-
nal-input range for VDDbVEEe15V
Y
High ‘‘OFF’’ resistance channel leakage of g10 pA
(typ) at VDDbVEEe10V
Y
Logic level conversion for digital addressing signals of
3 – 15V (VDDbVSSe3–15V) to switch analog signals to
15 Vp-p (VDDbVEEe15V)
Y
Matched switch characteristics
D
RONe5X (typ) for
VDDbVEEe15V
Y
Very low quiescent power dissipation under all digital-
control input and supply conditions
1 mW (typ) at
VDDbVSSeVDDbVEEe10V
Y
Binary address decoding on chip
Connection Diagrams
Dual-In-Line Packages
CD4051BMCD4051BC
CD4052BMCD4052BC
CD4053BMCD4053BC
TLF5662 – 1
Order Number CD4051B CD4052B or CD4053B
C1995 National Semiconductor Corporation
RRD-B30M105Printed in U S A


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