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DAC1006LCWM Datasheet(PDF) 6 Page - National Semiconductor (TI) |
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DAC1006LCWM Datasheet(HTML) 6 Page - National Semiconductor (TI) |
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6 / 22 page  10 DEFINITION OF PACKAGE PINOUTS 11 Control Signals (All control signals are level actuated) CS Chip Select active low it will enable WR WR Write The active low WR is used to load the digital data bits (DI) into the input latch The data in the input latch is latched when WR is high The 10-bit input latch is split into two latches one holds 8 bits and the other holds 2 bits The Byte1Byte2 control pin is used to select both input latches when Byte1Byte2e1 or to overwrite the 2-bit input latch when in the low state Byte1Byte2 Byte Sequence Control When this control is high all ten locations of the input latch are enabled When low only two locations of the input latch are enabled and these two locations are overwritten on the second byte write On the DAC1006 1007 and 1008 the Byte1Byte2 must be low to transfer the 10-bit data in the input latch to the DAC register XFER Transfer Control Signal active low This signal in combination with others is used to transfer the 10-bit data which is available in the input latch to the DAC register see timing diagrams 12 Other Pin Functions DIi (ie0 to 9) Digital Inputs DI0 is the least significant bit (LSB) and DIg is the most significant bit (MSB) IOUT1 DAC Current Output1IOUT1 is a maximum for a digital input code of all 1s and is zero for a digital input code of all 0s IOUT2 DAC Current Output2IOUT2 is a constant minus IOUT1 or IOUT1aIOUT2e 1023 VREF 1024 R where R j 15 kX RFB Feedback Resistor This is provided on the IC chip for use as the shunt feedback resistor when an external op amp is used to provide an output voltage for the DAC This on-chip resistor should always be used (not an external re- sistor) because it matches the resistors used in the on-chip R-2R ladder and tracks these resistors over temperature VREF Reference Voltage Input This is the connection for the external precision voltage source which drives the R-2R ladder VREF can range from b10 to a10 volts This is also the analog voltage input for a 4-quadrant multiplying DAC application VCC Digital Supply Voltage This is the power supply pin for the part VCC can be from a5to a15 VDC Operation is optimum for a15V The input threshold voltages are nearly independent of VCC (See Typical Performance Characteris- tics and Description in Section 30 T2L compatible logic inputs) GND Ground the ground pin for the part 13 Definition of Terms Resolution Resolution is directly related to the number of switches or bits within the DAC For example the DAC1006 has 210 or 1024 steps and therefore has 10-bit resolution Linearity Error Linearity error is the maximum deviation from a straight line passing through the endpoints of the DAC transfer characteristic It is measured after adjusting for zero and full-scale Linearity error is a parameter intrinsic to the device and cannot be externally adjusted National’s linearity test (a) and the ‘‘best straight line’’ test (b) used by other suppliers are illustrated below The ‘‘best straight line’’ requires a special zero and FS adjustment for each part which is almost impossible for user to determine The ‘‘end point test’’ uses a standard zero and FS adjust- ment procedure and is a much more stringent test for DAC linearity Power Supply Sensitivity Power supply sensitivity is a measure of the effect of power supply changes on the DAC full-scale output (which is the worst case) a End Point Test After Zero and FS Adj b Best Straight Line TLH5688 – 8 6 |
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Descripción similar - DAC1006LCWM |
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