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AD7530KN Datasheet(PDF) 6 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
No. de pieza AD7530KN
Descripción Electrónicos  10-Bit, 12-Bit Binary Multiplying D/A Converter
Download  14 Pages
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Fabricante Electrónico  NSC [National Semiconductor (TI)]
Página de inicio  http://www.national.com
Logo NSC - National Semiconductor (TI)

AD7530KN Datasheet(HTML) 6 Page - National Semiconductor (TI)

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Typical Applications (Continued)
TLH5689 – 5
VOUT ebVREF
A12aA24a  a A10
1024
b
1
1024
J
where AN ea1ifAN input is high
AN eb1ifAN input is low
COMPLEMENTARY OFFSET BINARY
(BIPOLAR) OPERATION
DIGITAL INPUT
VOUT
0000000000
a
VREF
0000000001 VREF c 10221024
0111111111
VREF c 21024
1000000000
0
1000000001
b
VREF c 21024
1111111111 bVREF (10221024)
Note that
 IOUT 1 a IOUT 2 e
VREF
RLADDER
c
1023
1024
J
 By doubling the output range we get half the
resolution
 The 10M resistor adds a 1 LSB ‘‘thump’’ to
allow full offset binary operation where the out-
put reaches zero for the half-scale code If
symmetrical output excursions are required
omit the 10M resistor
FIGURE 7 Bipolar 4-Quadrant Multiplying Configuration
Operational Amplifiers VOS Adjust (Figure 7 )
a)
Switch all the digital inputs high adjust the VOS potenti-
ometer of op amp B to bring its output to a value equal
tob(VREF 1024) (V)
b)
Switch the MSB high and the remaining digital inputs
low Adjust the VOS potentiometer of op amp A to bring
its output value to withina1mV from ground potential
For VREF k 10V a finer adjust is necessary as already
mentioned in the previous application
Gain Adjust (Full-Scale Adjust)
Assuming that the external 10k resistors are matched to
better than 01% the gain adjust of the circuit is the same
with the one previously discussed
TLH5689 – 6
TRUE OFFSET BINARY OPERATION
DIGITAL INPUT
VOUT
1111111111VREF c 10221024
1000000000
0
0000000000
b
VREF
ts e 18 ms
use LM336 for a voltage reference
FIGURE 8 Bipolar Configuration with a Single Op Amp
 R4 e (2AVb b 1) R
R2
R1
e
AVb
AVb b 1
R3 a R1
llR2 e R AVb e
VOUT(PEAK)
VREF
R e 20k

Example VREF e 2V VOUT (swing) j g10V AVb e 5V
Then R4 e 9R R1 e 08 R2 If R1 e 02R then R2 e 025R
R3 e 064R
FIGURE 9 Bipolar Configuration with
Increased Output Swing
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