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CDC319 Datasheet(PDF) 1 Page - Texas Instruments

No. de pieza CDC319
Descripción Electrónicos  1Line to 10Line Clock Driver
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI1 - Texas Instruments

CDC319 Datasheet(HTML) 1 Page - Texas Instruments

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CDC319
1-LINE TO 10-LINE CLOCK DRIVER
WITH I2C CONTROL INTERFACE
SCAS590A – DECEMBER 1997 – REVISED OCTOBER 2001
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D High-Speed, Low-Skew 1-to-10 Clock Buffer
for SDRAM (Synchronous DRAM) Clock
Buffering Applications
D Output Skew, tsk(o), Less Than 250 ps
D Pulse Skew, tsk(p), Less Than 500 ps
D Supports up to Two Unbuffered SDRAM
DIMMs (Dual Inline Memory Modules)
D I2C Serial Interface Provides Individual
Enable Control for Each Output
D Operates at 3.3 V
D Distributed VCC and Ground Pins Reduce
Switching Noise
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015
D Packaged in 28-Pin Shrink Small Outline
(DB) Package
description
The CDC319 is a high-performance clock buffer that distributes one input (A) to 10 outputs (Y) with minimum
skew for clock distribution. The CDC319 operates from a 3.3-V power supply, and is characterized for operation
from 0
°C to 70°C.
The device provides a standard mode (100K-bits/s) I2C serial interface for device control. The implementation
is as a slave/receiver. The device address is specified in the I2C device address table. Both of the I2C inputs
(SDATA and SCLOCK) provide integrated pullup resistors (typically 140 k
Ω) and are 5-V tolerant.
Three 8-bit I2C registers provide individual enable control for each of the outputs. All outputs default to enabled
at powerup. Each output can be placed in a disabled mode with a low-level output when a low-level control bit
is written to the control register. The registers are write only and must be accessed in sequential order (i.e.,
random access of the registers is not supported).
The CDC319 provides 3-state outputs for testing and debugging purposes. The outputs can be placed in a
high-impedance state via the output-enable (OE) input. When OE is high, all outputs are in the operational state.
When OE is low, the outputs are placed in a high-impedance state. OE provides an integrated pullup resistor.
Copyright
 2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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VCC
1Y0
1Y1
GND
VCC
1Y2
1Y3
GND
A
VCC
3Y0
GND
VCC
SDATA
VCC
2Y3
2Y2
GND
VCC
2Y1
2Y0
GND
OE
VCC
3Y1
GND
GND
SCLOCK
DB PACKAGE
(TOP VIEW)


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