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CDC2516DGGR Datasheet(PDF) 9 Page - Texas Instruments |
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CDC2516DGGR Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 15 page  CDC2516 3.3V PHASELOCK LOOP CLOCK DRIVER SCAS579C − OCTOBER 1996 − REVISED DECEMBER 2004 9 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TYPICAL CHARACTERISTICS Figure 3 PHASE ERROR vs CLOCK FREQUENCY −400 −600 −800 −1000 55 95 fclk − Clock Frequency − MHz −300 −500 −700 −900 75 115 135 VDD = 3.3 V TA = 25°C −200 0 35 −100 Figure 4 VDD = 3.3 V CL = 30 pF OUTPUT DUTY CYCLE vs CLOCK FREQUENCY 57% 53% 51% 47% 43% 55% 49% 45% 50 70 110 fclk − Clock Frequency − MHz 90 130 30 Figure 5 ANALOG SUPPLY CURRENT vs CLOCK FREQUENCY 25 6 4 2 0 35 45 55 85 95 fclk − Clock Frequency − MHz 75 7 5 3 1 65 105 115 125 8 9 VDD = 3.3 V TA = 25°C Figure 6 DYNAMIC SUPPLY CURRENT vs CLOCK FREQUENCY 300 200 100 0 fclk − Clock Frequency − MHz 350 250 150 50 400 450 500 0 20 40 60 120 140 100 80 VCC = 3.6 V Bias = 0/3 V CL = 30 pF to GND TA = 25°C |
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