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CDCM1804RGERG4 Datasheet(PDF) 9 Page - Texas Instruments

No. de pieza CDCM1804RGERG4
Descripción Electrónicos  1:3 LVPECL CLOCK BUFFER ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER
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CDCM1804RGERG4 Datasheet(HTML) 9 Page - Texas Instruments

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SUPPLY CURRENT ELECTRICAL CHARACTERISTICS
f − Frequency − MHz
110
120
130
140
150
160
170
180
100
300
500
700
900
1100
1300
1500
VDD = 3.3 V
TA = 25°C
Load = 10 pF/1k/1k for LVCMOS
50
Ω to VDD − 2 V for LVPECL
3 LVPECL Outputs (
÷1),
LVCMOS Output (
÷4)
3 LVPECL Outputs (
÷1)
Running, LVCMOS Output Off
2 LVPECL Outputs (
÷1),
LVCMOS Output (
÷4)
G005
CDCM1804
SCAS697E – JULY 2003 – REVISED MAY 2005
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
All outputs enabled and terminated with 50
Ω to
VDD – 2 V on LVPECL outputs and 10 pF on LVCMOS
Full load
160
output, f = 800 MHz for LVPECL outputs and 200 MHz for
Supply current
mA
LVCMOS, VDD = 3.3 V
IDD
Outputs enabled, no output load, f = 800 MHz for LVPECL
No load
110
outputs and 200 MHz for LVCMOS, VDD = 3.6 V
Supply current saving per LVPECL
f = 800 MHz for LVPECL output, VDD = 3.3 V
10
mA
output stage disabled, no load
All outputs in the high-impedance state by control logic, f = 0
IDDZ
Supply current, 3-state
Hz,
0.5
mA
VDD = 3.6 V
SUPPLY CURRENT
vs
FREQUENCY
Figure 6.
9


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