1

FEATURES

1

20

2

19

3

18

4

17

5

16

6

15

7

14

8

13

9

12

10

11

T/C

D1

D2

V

CC

Y1

Y2

Y3

Y4

Y5

Y6

Y7

Y8

OE

D3

D4

D5

D6

D7

D8

GND

DESCRIPTION

SN74AHC8541

8-BIT INVERTING/NON-INVERTING SCHMITT-TRIGGER BUFFER WITH 3-STATE OUTPUTS

N OR PW PACKAGE

• Operating Range of 2 V to 5.5 V V

CC

(TOP VIEW)

• 8-Bit Inverting/Non-Inverting Outputs

• 20-Pin Thin Shrink Small-Outline Package

[TSSOP (PW)] and 20-Pin Plastic Dual-In-Line

Package [PDIP (N)]

The SN74AHC8541 8-bit inverting/non-inverting buffers are ideal for driving bus lines or buffer memory address

registers. These devices feature inputs and outputs on opposite sides of the package to facilitate printed circuit

board layout.

All outputs are in the high-impedance state (disabled) when the output-enable (OE) input is high. When OE is

low, the respective gate passes the data from the D input to its Y output.

The T/C input selects inverting or non-inverting data transfer. When the T/C input is high, it provides

non-inverting buffers. When the T/C input is low, it provides inverting buffers when they are not in the

high-impedance state.

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

FUNCTION TABLE

INPUTS

OUTPUT

Y

OE

T/C

D

L

H

H

H

L

H

L

L

L

L

H

L

L

L

L

H

H

X

X

Z

(1)

L: Low-level

H: High-level

X: Irrelevant

Z: High-impedance (off)

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Copyright © 2009, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.