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SN74ALS677ADWR Datasheet(PDF) 5 Page - Texas Instruments |
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SN74ALS677ADWR Datasheet(HTML) 5 Page - Texas Instruments |
5 / 7 page SN74ALS677A 16BIT ADDRESS COMPARATOR SDAS012C − JUNE 1982 − REVISED JANUARY 1995 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 APPLICATION INFORMATION The SN74ALS677A can be wired to recognize any one of 216 addresses. The number of lows in the address determines the input pattern for the P inputs. Those system address lines that are low in the address to be recognized are connected to the lowest-numbered A inputs of the address comparator. The system address lines that are high are connected to the highest-numbered A inputs. For example, assume the comparator is to enable a device when the 16-bit system address is: A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 H H L L H H L L HH L L HHHH Because the address contains six lows and ten highs, the following connections are made: • P3 to 0 V, P2 to V CC, P1 to VCC, and P0 to 0 V • System address lines A13, A12, A9, A8, A5, and A4 to comparator inputs A1 through A6 in any convenient order • The remaining ten system address lines to comparator inputs A7 through A16 in any convenient order The output provides an active-low enabling signal. Figure 1 shows a modulo-N synchronous counter. The ′ALS163B provides a low-level clear signal when N = FEFF16. CLR CLK CLK 1R C1/+ CTR 16 Four ′ALS163B Maximum Count EN 0 3 P0 P1 P2 P3 VCC G P [P = 1] [ADDRESS COMP] A1 A2 − A16 FEFF16 = HHHH HHHL HHHH HHHH 15 12 8 4 0 9...15 8 0...7 SN74ALS677A 8 715 Figure 1. Modulo-N Synchronous Counter |
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