SN74ALVC16245

16BIT BUS TRANSCEIVER

WITH 3STATE OUTPUTS

SCAS419D − JANUARY 1993 − REVISED AUGUST 1995

1

POST OFFICE BOX 655303

POST OFFICE BOX 1443

CMOS) Submicron Process

Widebus

 Family

MIL-STD-883C, Method 3015; Exceeds

200 V Using Machine Model

(C = 200 pF, R = 0)

Per JEDEC Standard JESD-17

Need for External Pullup / Pulldown

Resistors

Shrink Small-Outline (DL) and Thin Shrink

Small-Outline (DGG) Packages

description

The

SN74ALVC16245

16-bit

(dual-octal)

noninverting bus transceiver is designed for 2.3-V

The

SN74ALVC16245

is

designed

for

asynchronous communication between data

buses.

The

control-function

implementation

minimizes external timing requirements.

This device can be used as two 8-bit transceivers

or

one

16-bit

transceiver.

It

allows

data

transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the

direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses

are effectively isolated.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN74ALVC16245 is available in TI’s shrink small-outline (DL) and thin shrink small-outline (DGG)

packages, which provide twice the I/O pin count and functionality of standard small-outline packages in the

same printed-circuit-board area.

The SN74ALVC16245 is characterized for operation from − 40

°C to 85°C.

FUNCTION TABLE

(each 8-bit section)

INPUTS

OPERATION

OE

DIR

OPERATION

L

L

B data to A bus

L

H

A data to B bus

H

X

Isolation

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

DGG OR DL PACKAGE

(TOP VIEW)

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

1DIR

1B1

1B2

GND

1B3

1B4

1B5

1B6

GND

1B7

1B8

2B1

2B2

GND

2B3

2B4

2B5

2B6

GND

2B7

2B8

2DIR

1OE

1A1

1A2

GND

1A3

1A4

1A5

1A6

GND

1A7

1A8

2A1

2A2

GND

2A3

2A4

2A5

2A6

GND

2A7

2A8

2OE

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Copyright

 1995, Texas Instruments Incorporated

EPIC and Widebus are trademarks of Texas Instruments Incorporated.