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SN74ALVCH162831GR Datasheet(PDF) 1 Page - Texas Instruments

No. de pieza SN74ALVCH162831GR
Descripción Electrónicos  1-BIT TO 4-BIT ADDRESS REGISTER/DRIVER WITH 3-STATE OUTPUTS
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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SN74ALVCH162831GR Datasheet(HTML) 1 Page - Texas Instruments

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FEATURES
DESCRIPTION/ORDERING INFORMATION
DBB PACKAGE
(TOP VIEW)
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4Y1
3Y1
GND
2Y1
1Y1
VCC
NC
A1
GND
NC
A2
GND
NC
A3
VCC
NC
A4
GND
CLK
OE1
OE2
SEL
GND
A5
A6
VCC
A7
NC
GND
A8
NC
GND
A9
NC
VCC
4Y9
3Y9
GND
2Y9
1Y9
1Y2
2Y2
GND
3Y2
4Y2
VCC
1Y3
2Y3
GND
3Y3
4Y3
GND
1Y4
2Y4
VCC
3Y4
4Y4
GND
1Y5
2Y5
3Y5
4Y5
GND
1Y6
2Y6
VCC
3Y6
4Y6
GND
1Y7
2Y7
GND
3Y7
4Y7
VCC
1Y8
2Y8
GND
3Y8
4Y8
NC − No internal connection
SN74ALVCH162831
1-BIT TO 4-BIT ADDRESS REGISTER/DRIVER
WITH 3-STATE OUTPUTS
SCES084H – AUGUST 1996 – REVISED SEPTEMBER 2004
Member of the Texas Instruments Widebus™
Family
Output Ports Have Equivalent 26-
Ω Series
Resistors, So No External Resistors Are
Required
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
This 1-bit to 4-bit address register/driver is designed
for 1.65-V to 3.6-V VCC operation.
The device is ideal for use in applications in which a
single address bus is driving four separate memory
locations. The SN74ALVCH162831 can be used as a
buffer or a register, depending on the logic level of
the select (SEL) input.
When SEL is logic high, the device is in the buffer
mode. The outputs
follow
the
inputs
and
are
controlled by the two output-enable (OE) inputs. Each
OE controls two groups of nine outputs.
When SEL is logic low, the device is in the register
mode. The register is an edge-triggered D-type
flip-flop. On the positive transition of the clock (CLK)
input, data set up at the A inputs is stored in the
internal registers. OE controls operate the same as in
buffer mode.
When OE is logic low, the outputs are in a normal
logic state (high or low logic level). When OE is logic
high, the outputs are in the high-impedance state.
SEL and OE do not affect the internal operation of
the flip-flops. Old data can be retained or new data
can be entered while the outputs are in the
high-impedance state.
The outputs, which are designed to sink up to 12 mA,
include equivalent 26-
Ω resistors to reduce overshoot
and undershoot.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1996–2004, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
OBSOLETE


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