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SN74ALS29823NT Datasheet(PDF) 1 Page - Texas Instruments |
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SN74ALS29823NT Datasheet(HTML) 1 Page - Texas Instruments |
1 / 11 page SN54ALS29823 . . . JT PACKAGE SN74ALS29823 . . . DW OR NT PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 OE 1D 2D 3D 4D 5D 6D 7D 8D 9D CLR GND VCC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q 9Q CLKEN CLK SN54ALS29823, SN74ALS29823 9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS146B – JANUARY 1986 – REVISED JANUARY 1995 Copyright © 1995, Texas Instruments Incorporated 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 • Functionally Equivalent to AMD’s AM29823 • Provide Extra Data Width Necessary for Wider Address/Data Paths or Buses With Parity • Outputs Have Undershoot-Protection Circuitry • Power-Up High-Impedance State • Buffered Control Inputs Reduce dc Loading Effects • Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) and Ceramic (JT) 300-mil DIPs description These 9-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers, parity bus interfacing, and working registers. With the clock-enable (CLKEN) input low, the nine D-type edge-triggered flip-flops enter data on the low-to-high transitions of the clock (CLK) input. Taking CLKEN high disables the clock buffer, latching the outputs. The ′ALS29823 have noninverting data (D) inputs. Taking the clear (CLR) input low causes the nine Q outputs to go low independently of the clock. A buffered output-enable (OE) input places the nine outputs in either a normal logic state (high or low logic levels) or a high-impedance state. The outputs also are in the high-impedance state during power-up and power-down conditions. The outputs remain in the high-impedance state while the device is powered down. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The SN54ALS29823 is characterized for operation over the full military temperature range of – 55 °C to 125°C. The SN74ALS29823 is characterized for operation from 0 °C to 70°C. FUNCTION TABLE (each flip-flop) INPUTS OUTPUT OE CLR CLKEN CLK D Q L L X X X L L HL ↑ HH L HL ↑ LL L HH X X Q0 H X X X X Z PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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