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CD74HC4024PW Datasheet(PDF) 1 Page - Texas Instruments

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No. de pieza CD74HC4024PW
Descripción Electrónicos  High-Speed CMOS Logic 7-Stage Binary Ripple Counter
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CD74HC4024PW Datasheet(HTML) 1 Page - Texas Instruments

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Data sheet acquired from Harris Semiconductor
SCHS202C
Features
• Fully Static Operation
• Buffered Inputs
• Common Reset
• Negative Edge Clocking
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC
at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
Description
The ’HC4024 and ’HCT4024 are 7-stage ripple-carry binary
counters. All counter stages are master-slave flip-flops. The
state of the stage advances one count on the negative
transition of each input pulse; a high voltage level on the MR
line resets all counters to their zero state. All inputs and
outputs are buffered.
Pinout
CD54HC4024, CD54HCT4024
(CERDIP)
CD74HC4024
(PDIP, SOIC, TSSOP)
CD74HCT4024
(PDIP, SOIC)
TOP VIEW
Ordering Information
PART NUMBER
TEMP. RANGE
(oC)
PACKAGE
CD54HC4024F3A
-55 to 125
14 Ld CERDIP
CD54HCT4024F3A
-55 to 125
14 Ld CERDIP
CD74HC4024E
-55 to 125
14 Ld PDIP
CD74HC4024M
-55 to 125
14 Ld SOIC
CD74HC4024MT
-55 to 125
14 Ld SOIC
CD74HC4024M96
-55 to 125
14 Ld SOIC
CD74HC4024PW
-55 to 125
14 Ld TSSOP
CD74HC4024PWR
-55 to 125
14 Ld TSSOP
CD74HC4024PWT
-55 to 125
14 Ld TSSOP
CD74HCT4024E
-55 to 125
14 Ld PDIP
CD74HCT4024M
-55 to 125
14 Ld SOIC
NOTE: When ordering, use the entire part number. The suffixes 96
and R denote tape and reel. The suffix T denotes a small-quantity
reel of 250.
CP
MR
Q7
Q6
Q5
Q4
GND
VCC
NC
Q1
Q2
NC
Q3
NC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
November 1997 - Revised October 2003
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© 2003, Texas Instruments Incorporated
CD54HC4024, CD74HC4024,
CD54HCT4024, CD74HCT4024
High-Speed CMOS Logic
7-Stage Binary Ripple Counter
[ /Title
(CD74
HC402
4,
CD74
HCT40
24)
/Sub-
ject
(High
Speed
CMOS


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