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Si5348-D-EVB Datasheet(PDF) 11 Page - Silicon Laboratories |
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Si5348-D-EVB Datasheet(HTML) 11 Page - Silicon Laboratories |
11 / 54 page 3.7.4 Input Configuration and Terminations Inputs IN0-IN2 can be configured as differential or single-ended LVCMOS. Inputs IN3-IN4 are single-ended only. The recommended input termination schemes are shown in the figure below. Standard 50% duty cycle signals must be ac-coupled, while low duty cycle Pulsed CMOS signals can be dc-coupled. Unused inputs can be disabled and left unconnected when not in use. Standard AC-coupled Single-Ended (IN0-IN2) 100 3.3 V, 2.5 V LVPECL INx INx 50 50 50 Si5348 Si5348 3.3 V, 2.5 V, 1.8 V LVCMOS Pulsed CMOS Standard Standard Pulsed CMOS Pulsed CMOS DC-coupled Single-Ended (IN0-IN2) 3.3 V, 2.5 V, 1.8 V LVCMOS INx Pulsed CMOS Standard Si5348 50 R 2 R1 VDD R1 (Ohm) R2 (Ohm) 1.8 V 324 665 2.5 V 511 475 3.3 V 634 365 Resistor values for fIN_PULSED < 1 MHz 50 100 INx 3.3 V, 2.5 V LVDS or CML 50 Si5348 Pulsed CMOS Standard Standard AC-coupled Differential LVDS (IN0-IN2) Standard AC-coupled Differential LVPECL (IN0-IN2) IN3, IN4 – DC-coupled LVCMOS 50 Si5348 INx INxb INxb INxb INxb Figure 3.8. Termination of Differential and LVCMOS Input Signals Si5348 Rev D Data Sheet Functional Description silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 10 |
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