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LC898123F40XC Datasheet(PDF) 10 Page - ON Semiconductor |
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LC898123F40XC Datasheet(HTML) 10 Page - ON Semiconductor |
10 / 11 page LC898123F40XC www.onsemi.com 10 9-2 Two Wire Serial Interface Timing The device’s communication protocol is compatible with I2C (Fast mode Plus). This circuit has clock stretch function. Item Symbol Pin name Min Typ Max Units SCL clock frequency Fscl SCL 1000 kHz START condition hold time tHD,STA SCL SDA 0.26 s SCL clock Low period tLOW SCL 0.5 s SCL clock High period tHIGH SCL 0.26 s Setup time for repetition START condition tSU,STA SCL SDA 0.26 s Data hold time tHD,DAT SCL SDA 0 (*1) 0.9 s Data setup time tSU,DAT SCL SDA 50 ns SDA, SCL rising time tr SCL SDA 120 ns SDA, SCL falling time tf SCL SDA 120 ns STOP condition setup time tSU,STO SCL SDA 0.26 s Bus free time between STOP and START tBUF SCL SDA 0.5 s (*1) Although the I2C specification defines a condition that 300 ns of hold time is required internally, LC898123F40XC is designed for a condition with typ. 40 ns of hold time. If SDA signal is unstable around falling point of SCL signal, please implement an appropriate countermeasure on board, such as inserting a resistor. SD SCL |
Número de pieza similar - LC898123F40XC_16 |
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Descripción similar - LC898123F40XC_16 |
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