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744383230068 Datasheet(PDF) 2 Page - Texas Instruments |
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744383230068 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 157 page VR4, 1.2V FET FET VR3, 3.3V FET FET VR5, 5V FET FET VR2, 1.8V VR1, 1V FET FET LDO1, 0.6V LOAD SWITCH LOAD SWITCH SKYLAKE/ PLATFORM LOAD SWITCH LOAD SWITCH LOAD SWITCH LOAD SWITCH RTC, 3.1V + - VBATA TPS650830 PMIC I2C I/O + - BAT2 BAT1 ADAPTOR + - FET FET FET FET CHARGER FET FET FET NVDC Non-NVDC Copyright © 2016, Texas Instruments Incorporated KABYLAKE 2 TPS650830 SLVSCF4A – DECEMBER 2014 – REVISED JULY 2016 www.ti.com Submit Documentation Feedback Product Folder Links: TPS650830 Device Overview Copyright © 2014–2016, Texas Instruments Incorporated (1) For more information, see Section 11, Mechanical Packaging and Orderable Information. For the Skylake and Kabylake Power Map implementation, the five PMIC voltage regulators and LDO1 are assigned with the low-voltage rails merged or split according to the configuration. For the Volume (merged low voltage rails) configuration six external load switches are controlled and monitored by using six powergood comparator logic blocs. Device Information (1) PART NUMBER PACKAGE BODY SIZE (NOM) TPS650830 NFBGA (168) 7.00 mm x 7.00 mm NFBGA (159) 9.00 mm x 9.00 mm 1.4 Simplified System Diagram Figure 1-1. Simplified System Diagram |
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