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GS4981 Datasheet(PDF) 3 Page - Gennum Corporation

No. de pieza GS4981
Descripción Electrónicos  Monolithic Video Sync Separators
Download  14 Pages
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Fabricante Electrónico  GENNUM [Gennum Corporation]
Página de inicio  http://www.gennum.com
Logo GENNUM - Gennum Corporation

GS4981 Datasheet(HTML) 3 Page - Gennum Corporation

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520 - 23 - 03
Supply Voltage
4.5
5
13.2
V
Supply Current
Outputs at Logic 1
VCC = 5 V
-
4.6
6.5
mA
VCC = 12 V
-
5.0
7.0
mA
Video Input (Pin 2)
(a) Signal Level
VCC = 5 V
0.5
-
4
Vp-p
(b) Clamp Current
Charge
500
650
850
µA
Discharge - normal
9
11
13
µA
- Nosync flag raised
65
95
115
µA
(c) Delay to raising of Nosync flag
Video input held high
64
95
130
µs
(d) Sync Tip Clamp Voltage
-
1.55
-
V
Sync Slice Level
Relative to sync tip clamp voltage
70
77
84
mV
RSET Pin Reference Voltage (Pin 6)
See Note 1
1.14
1.24
1.34
V
Composite Sync Out (Pin 1)
See Note 2
40
60
80
ns
Delay from Video
CL = 15p
Back Porch Pulse Out (Pin 5)
CL = 15p
(a) Delay from Rising
Edge of Sync
400
500
650
ns
(b) Pulse Width
2.0
2.5
3.2
µs
(c) Occurence Rate
H
H
H
Vertical Sync Out (Pin 3)
(a) Pulse Width
Serrations during vertical interval
197.7
197.7
197.7
µs
(b) Default Starting Time
No serrations during the vertical interval
48
65
82
µs
Horizontal Scan Rate
Modified RSET
15
-
130
kHz
Logic Outputs
(a) VOH
IOH = 40 µA
VCC = 5 V
4.2
4.6
-
V
VCC = 12 V
11.2
11.6
-
V
IOH = 1.6 mA
VCC = 5 V
2.4
3.4
-
V
VCC = 12 V
9.4
10.4
-
V
(b) VOL
IOL = -1.6 mA
-
0.3
0.6
V
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
GS4881 ELECTRICAL CHARACTERISTICS
(V
CC
= 5 V, R
SET
= 680 k
Ω, T
A
= 25
° C, unless otherwise specified)
ORDERING INFORMATION
Part Number
Package Type
Temperature Range
GS4881 - CDA
8 PDIP
0
° to 70° C
GS4881 - CKA
8 SOIC
0
° to 70° C
GS4881 - CTA
8 TAPE
0
° to 70° C
GS4881 - IDA
8 PDIP
-25
° to 85° C
GS4881 - IKA
8 SOIC
-25
° to 85° C
GS4881 - ITA
8 TAPE
-25
° to 85° C
Note 1: When placing the R
SET
resistor and the 0.1
µF decoupling capacitor careful attention should be made to ensure that they are as close
as possible to pin 6. Care should also be taken to avoid parasitic capacitive coupling from any output pin (pins 1, 3, 5 and 7) to pin 6.
Note 2: Measured from slicing point of input falling edge to 50% point of composite sync falling edge.


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