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BU2394KN-E2 Datasheet(PDF) 4 Page - Rohm

No. de pieza BU2394KN-E2
Descripción Electrónicos  3ch Clock Generator for Digital Cameras
Download  25 Pages
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Fabricante Electrónico  ROHM [Rohm]
Página de inicio  http://www.rohm.com
Logo ROHM - Rohm

BU2394KN-E2 Datasheet(HTML) 4 Page - Rohm

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BU2394KN
4/21
TSZ02201-0E3E0J500700-1-2
© 2015 ROHM Co., Ltd. All rights reserved.
www.rohm.com
TSZ22111・15・001
04.Nov.2015 Rev.001
Electrical Characteristics
(VDD=3.3V, Ta=25°C, unless otherwise specified.)
When XTAL_SEL=H crystal frequency is 28.636363 MHz. At XTAL_SEL=L, crystal frequency is 14.318182 MHz
Parameter
Symbol
Limit
Unit
Conditions
Min
Typ
Max
Operating Circuit Current
IDD
-
45
60
mA
At no load
【Output H Voltage】
CLK1
VOH1
VDD-0.5
VDD-0.2
-
V
When current load = -9.0mA
CLK2
VOH2
VDD-0.5
VDD-0.2
-
V
When current load = -7.0mA
REF_CLK
VOHR
VDD-0.5
VDD-0.2
-
V
When current load = -4.5mA
【Output L Voltage】
CLK1
VOL1
-
0.2
0.5
V
When current load =11mA
CLK2
VOL2
-
0.2
0.5
V
When current load =9.0mA
REF_CLK
VOLR
-
0.2
0.5
V
When current load =5.5mA
【Pull-Up Resistance Value】
FS1, FS2, FS3,
CLK2ON, XTAL_SEL
Pull-Up
R
125
250
375
Ω
Monitor pin = 0V (R=VDD/I)
【Output Frequency】
CLK1 FS2:H FS3:H
fCLK1-1
-
135.000000
-
MHz
XTAL x (1188/63)/2
CLK1 FS2:H FS3:L
fCLK1-2
-
108.000000
-
MHz
XTAL x (1056/70)/2
CLK1 FS2:L FS3:L
fCLK1-3
-
98.181818
-
MHz
XTAL x (864/63)/2
CLK1 FS2:L FS3:H
fCLK1-4
-
110.000000
-
MHz
XTAL x (968/63)/2
CLK2
fCLK2-2
-
48.008022
-
MHz
XTAL x (228/17)/4
REF_CLK FS1:H
fREF1-1
-
14.318182
-
MHz
XTAL Output
REF_CLK FS1:L
fREF1-2
-
17.734450
-
MHz
XTAL x (706/57)/10
【Output Waveform】
Duty1
100MHz or Less
Duty1
45
50
55
Measured at a voltage of 1/2
of VDD
Duty2
100MHz or More
Duty2
-
50
-
Measured at a voltage of 1/2
of VDD
Rise Time
tR
-
2.5
-
nsec
Period of transition time
required for the output to
reach 80% from 20% of VDD.
Fall Time
tF
-
2.5
-
nsec
Period of transition time
required for the output to
reach 20% from 80% of VDD.
【Jitter】
Period-Jitter 1
σ
P-J1
σ
-
30
-
psec
(Note 1)
Period-Jitter MIN-MAX
P-J
MIN-MAX
-
180
-
psec
(Note 2)
【Output Lock-Time】
tLOCK
-
1
msec
(Note 3)
(Note) The output frequency is determined by the arithmetic (frequency division) expression of a frequency input to XTALIN. If the input frequency is set to values
shown below, the output frequency will be as listed above.
When XTAL_SEL is set to H, the input frequency on XTALIN will be 28.636363 MHz.
When XTAL_SEL is set to L, the input frequency on XTALIN will be 14.318182 MHz.
(Note 1) Period-
Jitter 1σ
This parameter represents standard deviation (
=1σ) on cycle distribution data at the time when the output clock cycles are sampled 1000 times consecutively
with the TDS7104 Digital Phosphor Oscilloscope of Tektronix Japan, Ltd.
(Note 2) Period-Jitter
MIN-MAX
This parameter represents a maximum distribution width on cycle distribution data at the time when the output clock cycles are sampled 1000 times
consecutively with the TDS7104 Digital Phosphor Oscilloscope of Tektronix Japan, Ltd.
(Note 3) Output Lock-Time
The Lock-Time represents the elapsed time after power supply turns ON to reach a 3.0V voltage, after the system is switched from Power-Down state to
normal operation state, or after the output frequency is switched until it is stabilized at a specified frequency, respectively.


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