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LM3524 Datasheet(PDF) 4 Page - National Semiconductor (TI) |
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LM3524 Datasheet(HTML) 4 Page - National Semiconductor (TI) |
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4 / 22 page  Electrical Characteristics (Continued) (Note 1) LM2524D LM3524D Symbol Parameter Conditions Tested Design Tested Design Units Typ Limit Limit Typ Limit Limit (Note 3) (Note 4) (Note 3) (Note 4) Sawtooth Valley R T = 5.6k, CT = 0.01 µF 1.1 0.8 0.6 0.6 V Min Voltage ERROR-AMP SECTION V IO Input Offset V CM = 2.5V 2 8 10 210 mV Max Voltage I IB Input Bias V CM = 2.5V 1 8 10 110 µA Max Current I IO Input Offset V CM = 2.5V 0.5 1.0 1 0.5 1 µA Max Current I COSI Compensation V IN(I) −VIN(NI) = 150 mV 65 65 µA Min Current (Sink) 95 95 125 125 µA Max I COSO Compensation V IN(NI) −VIN(I) = 150 mV −125 −125 µA Min Current (Source) −95 −95 −65 −65 µA Max A VOL Open Loop Gain R L = ∞,VCM = 2.5 V 80 74 60 80 70 60 dB Min VCMR Common Mode 1.5 1.4 1.5 V Min Input Voltage Range 5.5 5.4 5.5 V Max CMRR Common Mode 90 80 90 80 dB Min Rejection Ratio G BW Unity Gain A VOL = 0 dB, VCM = 2.5V 3 2 MHz Bandwidth V O Output Voltage R L = ∞ 0.5 0.5 V Min Swing 5.5 5.5 V Max PSRR Power Supply V IN = 8 to 40V 80 70 80 65 db Min Rejection Ratio COMPARATOR SECTION Minimum Duty Pin 9 = 0.8V, 00 0 0 % Max Cycle [R T = 5.6k, CT = 0.01 µF] Maximum Duty Pin 9 = 3.9V, 49 45 49 45 % Min Cycle [R T = 5.6k, CT = 0.01 µF] Maximum Duty Pin 9 = 3.9V, 44 35 44 35 % Min Cycle [R T = 1k, CT = 0.001 µF] V COMPZ Input Threshold Zero Duty Cycle 1 1 V (Pin 9) V COMPM Input Threshold Maximum Duty Cycle 3.5 3.5 V (Pin 9) I IB Input Bias −1 −1 µA Current CURRENT LIMIT SECTION V SEN Sense Voltage V (Pin 2) −V(Pin 1) ≥ 180 180 mV Min 150 mV 200 200 220 220 mV Max www.national.com 4 |
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