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LM2614BTL Datasheet(PDF) 11 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
No. de pieza LM2614BTL
Descripción Electrónicos  400mA Sub-Miniature Adjustable DC-DC Converter Optimized for RF Power Amplifiers
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Fabricante Electrónico  NSC [National Semiconductor (TI)]
Página de inicio  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM2614BTL Datasheet(HTML) 11 Page - National Semiconductor (TI)

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Device Information (Continued)
extending battery life when the load is in a low-power
standby mode. In PFM mode, quiescent current into the V
DD
pin is 160µA typ. In contrast, PWM mode V
DD-pin quiescent
current is 600µA typ.
PWM operation is intended for use with loads of 50mA or
more, when low noise operation is desired. Below 100mA,
PFM operation can be used to allow precise regulation, and
reduced current consumption. However, it should be noted
that for PA applications the PFM mode need not be used as
output voltage slew rates are of more concern to the system
designer. The LM2614 has an over-voltage feature that pre-
vents the output voltage from rising too high, when the
device is left in PWM mode under low-load conditions. See
Overvoltage Protection, for more information.
Switch modes with the SYNC/MODE pin, using a signal with
a slew rate faster than 5V/100µs. Use a comparator, Schmitt
trigger or logic gate to drive the SYNC/MODE pin. Do not
leave the pin floating or allow it to linger between thresholds.
These measures will prevent output voltage errors in re-
sponse to an indeterminate logic state. The LM2614
switches on each rising edge of SYNC. Ensure a minimum
load to keep the output voltage in regulation when switching
modes frequently.
FREQUENCY SYNCHRONIZATION
The SYNC/MODE input can also be used for frequency
synchronization. During synchronization, the LM2614 ini-
tiates cycles on the rising edge of the clock. When synchro-
nized to an external clock, it operates in PWM mode. The
device can synchronize to a 50% duty-cycle clock over
frequencies from 500kHz to 1MHz. If a different duty cycle is
used other than 50% the range for acceptable duty cycles
are 30% to 70%.
Use the following waveform and duty cycle guidelines when
applying an external clock to the SYNC/MODE pin. Clock
under/overshoot should be less than 100mV below GND or
above V
DD. When applying noisy clock signals, especially
sharp edged signals from a long cable during evaluation,
terminate the cable at its characteristic impedance and add
an RC filter to the SYNC pin, if necessary, to soften the slew
rate and over/undershoot. Note that sharp edged signals
from
a
pulse
or
function
generator
can
develop
under/overshoot as high as 10V at the end of an improperly
terminated cable.
OVERVOLTAGE PROTECTION
The LM2614 has an over-voltage comparator that prevents
the output voltage from rising too high when the device is left
in PWM mode under low-load conditions. When the output
voltage rises by about 100mV (Figure 3) over its regulation
threshold, the OVP comparator inhibits PWM operation to
skip pulses until the output voltage returns to the regulation
threshold. When resistor dividers are used the OVP thresh-
old at the output will be the value of the threshold at the
feedback pin times the resistor divider ratio. In over voltage
protection, output voltage and ripple will increase.
SHUTDOWN MODE
Setting the EN digital input pin low (<0.4V) places the
LM2614 in a 0.02µA (typ) shutdown mode. During shutdown,
the PFET switch, NFET synchronous rectifier, reference,
control and bias circuitry of the LM2614 are turned off.
Setting EN high enables normal operation. While turning on,
soft start is activated.
EN should be set low to turn off the LM2614 during system
power-up and undervoltage conditions when the supply is
less than the 2.8V minimum operating voltage. The LM2614
is designed for compact portable applications, such as mo-
bile phones. In such applications, the system controller de-
termines power supply sequencing. Although the LM2614 is
typically well behaved at low input voltages, this is not guar-
anteed.
INTERNAL SYNCHRONOUS RECTIFICATION
While in PWM mode, the LM2614 uses an internal NFET as
a synchronous rectifier to reduce rectifier forward voltage
drop and associated power loss. Synchronous rectification
provides a significant improvement in efficiency whenever
the output voltage is relatively low compared to the voltage
drop across an ordinary rectifier diode.
The internal NFET synchronous rectifier is turned on during
the inductor current down slope during the second part of
each cycle. The synchronous rectifier is turned off prior to the
next cycle, or when the inductor current ramps to zero at light
loads. The NFET is designed to conduct through its intrinsic
body diode during transient intervals before it turns on, elimi-
nating the need for an external diode.
CURRENT LIMITING
A current limit feature allows the LM2614 to protect itself and
external components during overload conditions. In PWM
mode cycle-by-cycle current limit is normally used. If an
excessive load pulls the voltage at the feedback pin down to
approximately 0.7V, then the device switches to a timed
current limit mode. In timed current limit mode the internal
P-FET switch is turned off after the current comparator trips
and the beginning of the next cycle is inhibited for 2.5µs to
force the instantaneous inductor current to ramp down to a
safe value. Timed current limit mode prevents the loss of
current control seen in some products when the voltage at
the feedback pin is pulled low in serious overload conditions.
DYNAMICALLY ADJUSTABLE OUTPUT VOLTAGE
The LM2614 can be used to provide dynamically adjustable
output voltage by using external feedback resistors. The
output can be varied from 1.0V to 3.6V in less than 30µs by
using an analog control signal (VCON) at the external feed-
back resistors. This feature is useful in PA applications
where peak power is needed only when the handset is far
away from the base station or when data is being transmit-
ted. In other instances the transmitting power can be re-
duced and hence the supply voltage to the PA can be
reduced helping maintain longer battery life. See Setting the
Output Voltage in the Application Information section for
further details.
In dropout conditions the output voltage is V
IN −IOUT (Rdc +
R
DSON (P)) where Rdc is the series resistance of the inductor
and R
DSON (P) is the on resistance of the PFET.
www.national.com
11


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