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ST72774J7B1 Datasheet(PDF) 5 Page - STMicroelectronics |
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ST72774J7B1 Datasheet(HTML) 5 Page - STMicroelectronics |
5 / 144 page ST72774/ST727754/ST72734 5/144 Revision follow-up Changes applied since version 4.0 Version 4.0 March 2001 Page 1:Addition of 72T774 (32KOTP). Addition of 60K/48K ROM for ST72754 Deletion of table “ device summary”, replaced with cross reference to table 36 on page 147. page 13 - addition of section 1.4. external connections Version 4.1 July 2001 Initial format reapplied, text and related figures in the same page. Table “Device summary” reinserted in cover page and updated. Update of table 36: ordering information (p143) Version 4.2 July 2001 Cover - addition of feature about system protection added, table for device summary: addition of stack values page 9 - figure 3: replaced 1KByte with 512 Bytes + notes about opcode fetch and HALT mode page 10 - table: CR replaced by WDGCR TIM replaced with Timer and WDG replaced with Watchdog page 115 - EDF register: addition of “read from RAM”, EDE: few changes page 135 - Note 1 replaced, note 2 added SUSpend mode limitation.. Whole document: all mentions of HALT mode either deleted or rewritten. Version 4.3 October 2001 p140, chapter 8, section 8.1- code for unused bytes ( FFh) replaced with 9Dh (opcode for NOP) page 141- update of table 36 “Ordering information” page 142 - list of available devices updated page 114 - DDC DCR register: bit 5 = 1, text “or read from RAM” deleted Version 4.3 November 2001 page 10, one adddress corrected in the figure 3 “memory map”: 0400h page 14: addition of mandatory 1K resistor (text and figure) 3 |
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