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FM25160 Datasheet(PDF) 6 Page - List of Unclassifed Manufacturers |
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FM25160 Datasheet(HTML) 6 Page - List of Unclassifed Manufacturers |
6 / 14 page Ramtron FM25160 12 May 2000 6/14 RDSR - Read Status Register The RDSR command allows the bus master to verify the contents of the Status register. Reading Status provides information about the current state of the write protection features. Following the RDSR op- code, the FM25160 will return one bye with the contents of the Status register. The Status register is described in detail in a later section. WRSR – Write Status Register The WRSR command allows the user to select certain write protection features by writing a byte to the Status register. Prior to issuing a WRSR command, the /WP pin must be high or inactive. Note that on the FM25160, /WP only prevents writing to the Status register, not the memory array. Also prior to sending the WRSR command, the user must send a WREN command to enable writes. Note that executing a WRSR command is a write operation and therefore clears the Write Enable Latch. The bus configuration of RDSR and WRSR are shown below. Status Register & Write Protection The write protection features of the FM25160 are multi-tiered. First, a WREN op-code must be issued prior to any write operation. Assuming that writes are enabled using WREN, writes to memory are controlled by the Status register. As described above, writes to the status register are performed using the WRSR command and subject to the /WP pin. The Status register is organized as follows. Table 2. Status Register Bit 7 6 5 4 3 2 1 0 Name WPEN 0 0 0 BP1 BP0 WEL 0 Bits 0 and 4-6 are fixed at 0 and can not be modified. Note that the Ready bit in many EEPROMs is unnecessary as the FRAM writes in real-time and is never busy. The WPEN, BP1 and BP0 control write protection features. They are nonvolatile! The WEL flag indicates the state of the Write Enable Latch. Writing the WEL bit in the status register has no affect. BP1 and BP0 are memory block write protection bits. They specify portions of memory that are write protected as shown in the following table. Figure 6. RDSR Bus Configuration Figure 7. WRSR Bus Configuration |
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Descripción similar - FM25160 |
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