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FM30C256 Datasheet(PDF) 2 Page - List of Unclassifed Manufacturers |
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FM30C256 Datasheet(HTML) 2 Page - List of Unclassifed Manufacturers |
2 / 18 page FM30C256 Rev 2.1 Dec. 2002 Page 2 of 18 Figure 1. Block Diagram Pin Descriptions Pin Name Type Pin Description A2-A0 Input Device select inputs are used to address the part on a serial bus. To select the device, the address value on the three pins must match the corresponding bits contained in the device address. Note that these are not address pins for read/write operations. The address pins are pulled down internally. TIN Input Tamper detect is a battery backed input that stores a 1 in the Flags/Control register when it detects a rising edge on the TIN pin. CAL Output 512 Hz square-wave output for clock calibration X1, X2 I/O 32.768 kHz crystal connection. When using an external oscillator source, use X2 as the oscillator input and leave X1 floating. /RST Output Active low reset output (open drain) SDA I/O Serial Data Address. This is a bi-directional line for the two-wire interface. It is open-drain and is intended to be wire-OR’d with other devices on the two-wire bus. The input buffer incorporates a Schmitt trigger for noise immunity and the output driver includes slope control for falling edges. A pull-up resistor is required. SCL Input Serial Clock. The serial clock line for the two-wire interface. Data is clocked out of the part on the falling edge, and in on the rising edge. The SCL input also incorporates a Schmitt trigger input for noise immunity. VBAK Supply Battery backup supply voltage (3V) VDD Supply Supply Voltage (5V) VSS Supply Ground NC - No connect Address Latch & Counter 32K x 8 FRAM Array RTC Address Latch & Counter Serial to Parallel Converter Data Latch 8 Protocol & Device Select Real-time Clock Registers Power Isolation Tamper Flag Counters Power Management RTC Oscillator Tamper Latch Battery-backed power CAL TIN X2 X1 RST VBAK VDD SCL SDA A2-A0 32.768 kHz |
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