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LM2716MT-ADJ Datasheet(PDF) 6 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
No. de pieza LM2716MT-ADJ
Descripción Electrónicos  Dual (Step-up and Step-down) PWM DC/DC Converter
Download  17 Pages
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Fabricante Electrónico  NSC [National Semiconductor (TI)]
Página de inicio  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM2716MT-ADJ Datasheet(HTML) 6 Page - National Semiconductor (TI)

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Electrical Characteristics (Continued)
Specifications in standard type face are for T
J = 25˚C and those with boldface type apply over the full Operating Tempera-
ture Range (T
J = −40˚C to +125˚C) Unless otherwise specified. VIN = 5V and IL = 0A, unless otherwise specified.
Symbol
Parameter
Conditions
Min
(Note 4)
Typ
(Note 5)
Max
(Note 4)
Units
Th
SHDN1
Buck SHDN Threshold
Output High
1.37
2
V
Output Low
0.8
1.35
Th
SHDN2
Boost SHDN Threshold
Output High
1.37
2
V
Output Low
0.8
1.35
I
SS1
Buck Soft Start Pin Current
6
9.5
12
µA
I
SS2
Boost Soft Start Pin Current
15
19
22
µA
UVP
On Threshold
3.35
3.8
4.0
V
Off Threshold
3.10
3.6
3.9
θ
JA
Thermal Resistance
(Note 9)
TSSOP, package only
115
˚C/W
Note 1: Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended to
be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2: The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance, θJA,
and the ambient temperature, TA. See the Electrical Characteristics table for the thermal resistance. The maximum allowable power dissipation at any ambient
temperature is calculated using: PD (MAX) = (TJ(MAX) −TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown.
Note 3: The human body model is a 100 pF capacitor discharged through a 1.5k
Ω resistor into each pin. The machine model is a 200pF capacitor discharged
directly into each pin.
Note 4: All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are 100% tested
or guaranteed through statistical analysis. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods.
All limits are used to calculate Average Outgoing Quality Level (AOQL).
Note 5: Typical numbers are at 25˚C and represent the most likely norm.
Note 6: Duty cycle affects current limit due to ramp generator.
Note 7: Current limit at 95% duty cycle. See TYPICAL PERFORMANCE section for Switch Current Limit vs. VIN
Note 8: Bias current flows into FB pin.
Note 9: Refer to National’s packaging website for more detailed thermal information and mounting techniques for the TSSOP package.
www.national.com
6


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