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MAX1567ETL

 PLASTIC ENCAPSULATED DEVICES ( 8 Page)


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Attachment #1
TABLE II. Pin combination to be tested. 1/ 2/
1/
Table II is restated in narrative form in 3.4 below.
2/
No connects are not to be tested.
3/
Repeat pin combination I for each named Power supply and for ground
(e.g., where VPS1 is VDD, VCC, VSS, VBB, GND, +VS, -VS, VREF, etc).
3.4
Pin combinations to be tested.
a.
Each pin individually connected to terminal A with respect to the device ground pin(s) connected to terminal
B. All pins except the one being tested and the ground pin(s) shall be open.
b.
Each pin individually connected to terminal A with respect to each different set of a combination of all
named power supply pins (e.g., VSS1, or VSS2 or VSS3 or VCC1, or VCC2) connected to terminal B. All pins
except the one being tested and the power supply pin or set of pins shall be open.
c.
Each input and each output individually connected to terminal A with respect to a combination of all the
other input and output pins connected to terminal B. All pins except the input or output pin being tested and
the combination of all the other input and output pins shall be open
Terminal A
(Each pin individually
connected to terminal A
with the other floating)
Terminal B
(The common combination
of all like-named pins
connected to terminal B)
1.
All pins except VPS1 3/
All VPS1 pins
2.
All input and output pins
All other input-output pins
Mil Std 883D
Method 3015.7
Notice 8
REGULATED
HIGH VOLTAGE
SUPPLY
TERMINAL D
DUT
SOCKET
TERMINAL C
TERMINAL B
TERMINAL A
CURRENT
PROBE
(NOTE 6)
R = 1.5k
C = 100pf
SHORT
R2
S2
S1
R1
C1
1  2  3  4  5  6  7  8 



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