Data Sheet

AD8392A

Rev. A | Page 9 of 12

TYPICAL ADSL/ADSL2+ APPLICATION

In a typical ADSL/ADSL2+ application, a differential line driver

is used to take the signal from the analog front end (AFE) and

drive it onto the twisted pair telephone line. Referring to the

typical circuit representation in Figure 18, the differential input

output is transformer coupled to the telephone line at tip and

ring. The common-mode operating point, generally midway

R4

R4

R3

R3

R2

R1

R2

1:N

TIP

RING

Figure 18. Typical ADSL/ADSL2+ Application Circuit

In ADSL/ADSL2+ applications, it is common practice to

conserve power by using positive feedback to synthesize the

output resistance, thereby lowering the required ohmic value

somewhat unique in that the positive feedback introduced via

R3 has the effect of synthesizing the input resistance as well.

The following definitions and equations can be used to calculate

the resistor values necessary to obtain the desired gain, input

resistance, and output resistance for a given application. For

simplicity, the following calculations assume a lossless

transformer.

The following values are used in the design equations and are

assumed already known or chosen by the designer.

Value

Definition

Differential input voltage

Desired differential input resistance

N

Transformer turns ratio

Differential output voltage at tip and ring

Each is typically 5% to 15% of the transformer reflected

line impedance

R2

Recommended in the amplifier data sheet

Voltage at the + inputs to the amplifier, approximately

Transformer reflected line impedance

Additional definitions for calculating resistor values include:

Value

Definition

Voltage at the amplifier outputs

K

Matching resistance reduction factor

β

Negative feedback factor

α

Positive feedback factor

Note: R1 must be calculated before β and α.

(

)

N

k

V

V

LINE

OA

+

=

1

L

m

R

R

k

2

=

IN

LINE

V

V

N

V

A =

R2

R1

R1

2

β

+

=

(

)

k

−

= 1

β

α

With the above known quantities and definitions, the remaining

resistors can readily be calculated.

P

OA

P

V

V

R

V

R1

−

=

2

2

(

)

IN

P

IN

IN

V

2

V

V

R

R4

−

=

(

)

(

)

R2

R1

R

R

R2

R

R1

R

R1

R

R1

R4

A

R3

L

L

L

L

m

V

2

α

2α

α

2

+

−

−

+

=

(

)

R4

R3

R4

R4

R3

+

−

=

α

α

After building the circuit with the closest 1% resistor values,

the actual gain, input resistance, and output resistance can be

verified with the following equations.

(

)

(

)

R3

R4

R

R4

R3

R4

k

N

GAIN

BIAS

LINE

to

−













+

+

+

=

1

1

β













+

−

=

L

L

m

V

IN

R

R4

R

R

A

R4

R

2

β

1

2

(

)

























+

+

+













+

−

=

BIAS

BIAS

BIAS

BIAS

m

OUT

R

R4

R

R4

R3

R2

R1

R

R4

R1

R

R4

N

R

R

2

1

2

2