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SI7382DP Datasheet(PDF) 10 Page - Vishay Siliconix

No. de pieza SI7382DP
Descripción Electrónicos  N-Channel Reduced Qg, Fast Switching MOSFET
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Fabricante Electrónico  VISHAY [Vishay Siliconix]
Página de inicio  http://www.vishay.com
Logo VISHAY - Vishay Siliconix

SI7382DP Datasheet(HTML) 10 Page - Vishay Siliconix

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PowerPAK® SO-8 Mounting and Thermal Considerations
Application Note AN821
www.vishay.com
Vishay Siliconix
Revision: 16-Mai-13
4
Document Number: 71622
For technical questions, contact: powermosfettechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
SYSTEM AND ELECTRICAL IMPACT OF
PowerPAK SO-8
In any design, one must take into account the change in
MOSFET RDS(on) with temperature (figure 7).
Fig. 7 MOSFET RDS(on) vs. Temperature
A MOSFET generates internal heat due to the current
passing through the channel. This self-heating raises the
junction temperature of the device above that of the PC
board to which it is mounted, causing increased power
dissipation in the device. A major source of this problem lies
in the large values of the junction-to-foot thermal resistance
of the SO-8 package.
PowerPAK SO-8 minimizes the junction-to-board thermal
resistance to where the MOSFET die temperature is very
close to the temperature of the PC board. Consider two
devices mounted on a PC board heated to 105 °C by other
components on the board (figure 8).
Fig. 8 Temperature of Devices on a PC Board
Suppose each device is dissipating 2.7 W. Using the
junction-to-foot thermal resistance characteristics of the
PowerPAK
SO-8
and
the
standard
SO-8,
the
die
temperature is determined to be 107 °C for the PowerPAK
(and for DPAK) and 148 °C for the standard SO-8. This is a
2 °C rise above the board temperature for the PowerPAK
and a 43 °C rise for the standard SO-8. Referring to figure 7,
a 2 °C difference has minimal effect on RDS(on) whereas a
43 °C difference has a significant effect on RDS(on).
Minimizing the thermal rise above the board temperature by
using PowerPAK has not only eased the thermal design but
it has allowed the device to run cooler, keep rDS(on) low, and
permits the device to handle more current than the same
MOSFET die in the standard SO-8 package.
CONCLUSIONS
PowerPAK SO-8 has been shown to have the same thermal
performance as the DPAK package while having the same
footprint as the standard SO-8 package. The PowerPAK
SO-8 can hold larger die approximately equal in size to the
maximum that the DPAK can accommodate implying no
sacrifice in performance because of package limitations.
Recommended PowerPAK SO-8 land patterns are provided
to aid in PC board layout for designs using this new
package.
Thermal considerations have indicated that significant
advantages can be gained by using PowerPAK SO-8
devices in designs where the PC board was laid out for
the standard SO-8. Applications experimental data gave
thermal
performance
data
showing
minimum
and
typical thermal performance in a SO-8 environment, plus
information
on
the
optimum
thermal
performance
obtainable
including
spreading
copper.
This
further
emphasized the DPAK equivalency.
PowerPAK SO-8 therefore has the desired small size
characteristics of the SO-8 combined with the attractive
thermal characteristics of the DPAK package.
0.6
0.8
1.0
1.2
1.4
1.6
1.8
- 50
- 25
0
25
50
75
100
125
150
VGS = 10 V
ID = 23 A
On-Resistance vs. Junction Temperature
TJ - Junction Temperature (°C)
0.8 °C/W
107 °C
PowerPAK SO-8
16 C/W
148 °C
Standard SO-8
PC Board at 105 °C


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