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74HC4052D Datasheet(PDF) 6 Page - NXP Semiconductors |
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74HC4052D Datasheet(HTML) 6 Page - NXP Semiconductors |
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6 / 27 page  2004 Nov 11 6 Philips Semiconductors Product specification Dual 4-channel analog multiplexer, demultiplexer 74HC4052; 74HCT4052 handbook, full pagewidth MNB043 from logic VCC VEE VEE VCC VCC VEE nYn nZ VCC Fig.6 Schematic diagram (one switch). LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to VEE = GND (ground = 0 V); note 1. Notes 1. To avoid drawing VCC current out of pins nZ, when switch current flows in pins nYn, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into pins nZ, no VCC current will flow out of pins nYn. In this case there is no limit for the voltage drop across the switch, but the voltages at pins nYn and nZ may not exceed VCC or VEE. 2. For DIP16 packages: above 70 °C derate linearly with 12 mW/K. For SO16 packages: above 70 °C derate linearly with 8 mW/K. For SSOP16 and TSSOP16 packages: above 60 °C derate linearly with 5.5 mW/K. For DHVQFN16 packages: above 60 °C derate linearly with 4.5 mW/K. SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage −0.5 +11.0 V IIK input diode current VI <−0.5 V or VI > VCC + 0.5 V −±20 mA ISK switch diode current VS <−0.5 V or VS > VCC + 0.5 V −±20 mA IS switch current −0.5 V < VS < VCC + 0.5 V −±25 mA IEE VEE current −±20 mA ICC;IGND VCC or GND current −±50 mA Tstg storage temperature −65 +150 °C Ptot power dissipation Tamb = −40 °C to +125 °C; note − 500 mW PS power dissipation per switch − 100 mW |
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