CDCEL937PWR datasheet(4/39 Pages) TI1

No. de pieza	CDCEL937PWR

Descripción Electrónicos	Flexible Low Power LVCMOS Clock Generator With SSC Support For EMI Reduction

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Fabricante Electrónico	TI1 [Texas Instruments]

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1

Xin/CLK

20

Xout

2

S0

19

SDA/S1

3

VDD

18

SCL/S2

4

VCtrl

17

Y1

5

GND

16

GND

6

Vddout

15

Y2

7

Y4

14

Y3

8

Y5

13

Vddout

9

GND

12

Y6

10

Vddout

11

Y7

Not to scale

4

CDCE937, CDCEL937

SLAS564G – AUGUST 2007 – REVISED OCTOBER 2016

www.ti.com

Product Folder Links: CDCE937 CDCEL937

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(1)

G= Ground, I = Input, O = Output, P = Power

5 Pin Configuration and Functions

PW Package

20-Pin TSSOP

Top View

Pin Functions

TYPE(1)

DESCRIPTION

NAME

NO.

GND

5, 9, 16

G

Ground

SCL/S2

18

I

SCL: Serial clock input (default configuration), LVCMOS; Internal pullup 500k;

S2: User programmable control input; LVCMOS inputs; Internal pullup 500k

SDA/S1

19

I/O

SDA: Bi-directional serial data input/output (default configuration). LVCMOS; Internal pullup 500k;

S1: User programmable control input; LVCMOS inputs; Internal pullup 500k

S0

2

I

User programmable control input S0; LVCMOS inputs; Internal pullup 500k

VCtrl

4

I

VCXO control voltage, leave open or pullup (approximately 500k) when not used

VDD

3

P

1.8-V power supply for the device

Vddout

6, 10, 13

P

CDCEL937: 1.8-V supply for all outputs

CDCE937: 3.3-V or 2.5-V supply for all outputs

Xin/CLK

1

I

Crystal oscillator input or LVCMOS clock input (selectable through SDA/SCL bus)

Xout

20

O

Crystal oscillator output, leave open or pullup (~500k) when not used

Y1

17

O

LVCMOS outputs

Y2

15

O

LVCMOS outputs

Y3

14

O

LVCMOS outputs

Y4

7

O

LVCMOS outputs

Y5

8

O

LVCMOS outputs

Y6

12

O

LVCMOS outputs

Y7

11

O

LVCMOS outputs

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CDCEL937PWR Datasheet(PDF) 4 Page - Texas Instruments

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