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STF16N50U Datasheet(PDF) 5 Page - STMicroelectronics

No. de pieza STF16N50U
Descripción Electrónicos  Gate charge minimized
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
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STF16N50U Datasheet(HTML) 5 Page - STMicroelectronics

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STF16N50U
Electrical characteristics
Doc ID 17923 Rev 1
5/12
The built-in back-to-back Zener diodes have specifically been designed to enhance not only
the device’s ESD capability, but also to make them safely absorb possible voltage transients
that may occasionally be applied from gate to source. In this respect the Zener voltage is
appropriate to achieve an efficient and cost-effective intervention to protect the device’s
integrity. These integrated Zener diodes thus avoid the usage of external components.
Table 6.
Switching times
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off-delay time
Fall time
VDD = 250 V, ID = 5.5 A,
RG = 4.7 Ω, VGS = 10 V
(see
Figure 12)
-
16
21
21
15
-
ns
ns
ns
ns
Table 7.
Source drain diode
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
ISD
ISDM
(1)
1.
Pulse width limited by safe operating area.
Source-drain current
Source-drain current (pulsed)
-
11
44
A
A
VSD
(2)
2.
Pulsed: Pulse duration = 300 µs, duty cycle 1.5%.
Forward on voltage
ISD = 11 A, VGS = 0
-
1.6
V
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 11 A, di/dt = 100 A/µs
VDD = 35 V (see Figure 17)
-
85
280
7
ns
nC
A
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 11 A, di/dt = 100 A/µs
VDD = 35 V, Tj = 150 °C
(see
Figure 17)
-
120
490
8
ns
nC
A
Table 8.
Gate-source Zener diode
Symbol
Parameter
Test conditions
Min.
Typ.
Max. Unit
BVGSO
Gate-source breakdown
voltage
Igs=± 1 mA (open drain)
30
-
V


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