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TS110-7 Datasheet(PDF) 4 Page - STMicroelectronics |
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TS110-7 Datasheet(HTML) 4 Page - STMicroelectronics |
4 / 10 page Characteristics TS110-7 4/10 DocID022271 Rev 4 Figure 5. Relative variation of thermal impedance junction to ambient versus pulse duration Figure 6. Relative variation of gate triggering current and voltage, holding and latching current versus Tj K=[Z /R ] th(j-a) th(j-a) 0.01 0.10 1.00 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02 1.0E+03 TO-92 SMBflat-3L Copper surface area = 5cm² t (s) p I, I , I [T ] / GT H L j , V I , I , I , V [T =25°C] GT GT H L GT j 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 -40 -20 0 20 40 60 80 100 120 VGT IGT IH & I L T (°C) j Figure 7. Relative variation of holding current versus gate-cathode resistance (typical values) Figure 8. Relative variation of dV/dt immunity versus gate-cathode resistance (typical values) I [R ] / I [ = 220 ] HGK H Ω RGK 0.0 0.5 1.0 1.5 0.1 1.0 10.0 R(k ) GK Ω dV/dt[R ] / dV/dt[R = 220 ] GK GK W 0.01 0.10 1.00 10.00 0 200 400 600 800 R( ) GK W T = 125°C j V = 0.67 x V D DRM Figure 9. Relative variation of dV/dt immunity versus gate-cathode capacitance (typical values) Figure 10. Relative variation of dV/dt immunity versus junction temperature with RGK = 220 Ω (typical values) dV/dt[C ] / dV/dt[C = 100 nF] GK GK 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 20 40 60 80 100 120 140 160 180 200 220 C (nF) GK Tj = 125°C V = 0.67 x V D DRM Typical value of dV/dt = 25 V/µs [CGK = 100 nF] dV/dt[ ] / dV/dt[ = ] Tj Tj 125 °C 0 1 2 3 4 5 6 7 8 9 10 20 40 60 80 100 120 T (°C) j RGK = 220 V = 0.67 x V Ω D DRM |
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