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AM24LC21IS Datasheet(PDF) 9 Page - List of Unclassifed Manufacturers

No. de pieza AM24LC21IS
Descripción Electrónicos  Dual Mode, 1K-bits (128 x 8) 2-Wire Serial EEPROM
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Fabricante Electrónico  ETC [List of Unclassifed Manufacturers]
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AM24LC21IS Datasheet(HTML) 9 Page - List of Unclassifed Manufacturers

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AM24LC21
Dual Mode, 1K-bits (128 x 8) 2-Wire Serial EEPROM
(Preliminary)
Anachip Corp.
www.anachip.com.tw
Rev 0.0 Aug 10, 2002
9/13
Note:
Page write operations are limited to writing bytes
within a single physical page, regardless of the
number of bytes actually being written. Physical
page boundaries start at addresses that are integer
multiples of the page buffer size (or ‘page size’) and
end at addresses that are integer multiples of [page
size - 1]. If a page write command attempts to write
across a physical page boundary, the result is that
the data wraps around to the beginning of the
current page (overwriting data previously stored
there), instead of being written to the next page as
might be expected. It is therefore necessary for the
application
software
to
prevent
page
write
operations that would attempt to cross a page
boundary.
P
S
T
O
P
A
C
K
A
C
K
A
C
K
S
S
T
A
R
T
Control
Byte
Word
Address
Data
VCLK
Bus activity
SDA Line
Bus activity
Master
Figure 4-1. Byte write
S
T
O
P
A
C
K
A
C
K
S
S
T
A
R
T
Control
Byte
Word
Address
Data(n)
VCLK
Bus activity
SDA Line
Bus activity
Master
A
C
K
A
C
K
A
C
K
Data(n+1)
Data(n+7)
P
Figure 4-2. Page write
5.0 Acknowledge polling
Since the device will not acknowledge during a
write cycle, this can be used to determine when the
cycle is complete (this feature can be used to
maximize bus throughput). Once the stop condition
for a write command has been issued from the
master, the device initiates the internally timed write
cycle. ACK polling can be initiated immediately.
This involves the master sending a start condition
followed by the control byte for a write command
(R/W = 0). If the device is still busy with the write
cycle, then no ACK will be returned. If the cycle is
complete, then the device will return the ACK and
the master can then
proceed with the next read or write command. See
Figure 5-1 for the flow diagram.
6.0 Write protection
When using the AM24LC21 in the bi-directional
Mode, the VCLK pin operates as the write protect
control pin. Setting VCLK high allows normal write
operations, while setting VCLK low prevents writing
to any location in the array. Connecting the VCLK
pin to VSS would allow the AM24LC21 to operate
as a serial ROM, although this configuration would
prevent using the device in the transmit-only mode.


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