1

2

3

4

5

6

CS

GND

SDATA

SCLK

ADC081S101

3

ADC081S101-MIL

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SNAS747 – JUNE 2017

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5 Pin Configuration and Functions

DBV or NGF Package

6-Lead SOT-23 or WSON

Top View

Pin Functions

PIN

TYPE

DESCRIPTION

NO.

NAME

ANALOG I/O

3

I

DIGITAL I/O

4

SCLK

I

Digital clock input. This clock directly controls the conversion and readout processes.

5

SDATA

O

Digital data output. The output samples are clocked out of this pin on falling edges of the SCLK pin.

6

CS

I

Chip select. On the falling edge of CS, a conversion process begins.

POWER SUPPLY

1

P

Positive supply pin. This pin should be connected to a quiet +2.7-V to +5.25-V source and bypassed to

GND with a 1-µF capacitor and a 0.1-µF monolithic capacitor located within 1 cm of the power pin.

2

GND

G

The ground return for the supply and signals.

PAD

GND

G

For package suffix CISD(X) only, it is recommended that the center pad should be connected to ground.