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SM65MLVD207D Datasheet(PDF) 3 Page - Texas Instruments |
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SM65MLVD207D Datasheet(HTML) 3 Page - Texas Instruments |
3 / 10 page SN65MLVD201, SN65MLVD203 SN65MLVD206, SN65MLVD207 SLLS558A – DECEMBER 2002 – JUNE 2003 www.ti.com 3 DEVICE ELECTRICAL CHARACTERISTICS over recommended operating conditions unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT Driver only RE and DE at VCC, RL = 50 Ω, All others open 13 22 ICC Supply current Both enabled RE at VCC, DE at 0 V, RL = No Load, All others open 1 4 mA ICC Supply current Both enabled RE at 0 V, DE at VCC, RL = 50 Ω, All others open 16 24 mA Receiver only RE at 0 V, DE at 0 V, RL = 50 Ω, All others open 4 13 (1) All typical values are at 25 °C and with a 3.3-V supply voltage. DRIVER ELECTRICAL CHARACTERISTICS over recommended operating conditions unless otherwise noted PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX UNIT VAB or VYZ Differential output voltage magnitude See Figure 2 480 650 mV ∆VAB or ∆VYZ Change in differential output voltage magnitude between logic states See Figure 2 –50 50 mV VOS(SS) Steady-state common-mode output voltage 0.8 1.2 V ∆VOS(SS) Change in steady-state common-mode output voltage between logic states See Figure 3 –50 50 mV VOS(PP) Peak-to-peak common-mode output voltage 150 mV VY(OC) or VA(OC) Maximum steady-state open-circuit output voltage See Figure 7 0 2.4 V VZ(OC) or VB(OC) Maximum steady-state open-circuit output voltage See Figure 7 0 2.4 V VP(H) Voltage overshoot, low-to-high level output See Figure 5 1.2VSS V VP(L) Voltage overshoot, high-to-low level output See Figure 5 –0.2 VSS V IIH High-level input current (D, DE) VIH = 2 V 0 10 µA IIL Low-level input current (D, DE) VIL = 0.8 V 0 10 µA IOS Differential short-circuit output current magnitude See Figure 4 24 mA IOZ High-impedance state output current (driver only) –1.4 V ≤ VY or VZ ≤ 3.8 V, Other output = 1.2 V –15 10 µA IO(OFF) Power-off output current –1.4 V ≤ VY or VZ ≤ 3.8 V, Other output = 1.2 V, 0 V ≤ VCC ≤ 1.5 V –10 10 µA CY or CZ Output capacitance VI = 0.4 sin(30E6πt) + 0.5 V, (3) Other input at 1.2 V, driver disabled 3 pF CYZ Differential output capacitance VAB = 0.4 sin(30E6πt) V, (3) Driver disabled 2.5 pF CY/Z Output capacitance balance, (CY/CZ) 0.99 1.01 (1) The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet. (2) All typical values are at 25 °C and with a 3.3-V supply voltage. (3) HP4194A impedance analyzer (or equivalent) |
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