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RT5508 Datasheet(PDF) 53 Page - Richtek Technology Corporation |
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RT5508 Datasheet(HTML) 53 Page - Richtek Technology Corporation |
53 / 57 page RT5508 Copyright © 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation DS5508-01 March 2017 www.richtek.com 53 ADDR Byte Bits R/W Name Description Default 0xDE 20 159:128 R/W bq_12_b0 u[31:26], b0[25:0] 32'h00800000 127:96 R/W bq_12_b1 u[31:26], b1[25:0] 32'h00000000 95:64 R/W bq_12_b2 u[31:26], b2[25:0] 32'h00000000 63:32 R/W bq_12_a1 u[31:26], a1[25:0] 32'h00000000 31:0 R/W bq_12_a2 u[31:26], a2[25:0] 32'h00000000 0xDF 2 15 R/W DC_CUT_FILTER_DIS 1 : Disable DC-Cut filter 0 14 R/W H_BAND_BYPASS 1 : Bypass High band DRC 0 13 R/W M_BAND_BYPASS 1 : Bypass Middle band DRC 0 12 R/W L_BAND_BYPASS 1 : Bypass Low band DRC 0 11:10 - Reserved - 9 R/W SideChain_2_ON 1 : Enable sidchain for low band DRC 0 8 R/W SideChain_1_ON 1 : Enable sidchain for Middle band DRC 0 7:5 - Reserved - 0 4 R/W DRC5_EN 1 : DRC5 enable 0 3 R/W DRC4_EN 1 : DRC4 enable 0 2 R/W DRC3_EN 1 : DRC3 enable 0 1 R/W DRC2_EN 1 : DRC2 enable 0 0 R/W DRC1_EN 1 : DRC1 enable 0 0xF4 1 7 R/W FDRC_CK_EN 1 : Enable FDRC block clock 1 6 R/W BOOST_CK_EN 1 : Enable BOOST block clock 1 5 R/W ADC_CK_EN 1 : Enable ADC block clock 1 4 R/W DAC_CK_EN 1 : Enable DAC block clock 1 3 R/W SSRC_CK_EN 1 : Enable SSRC block clock 1 2 R/W DSP_CK_EN 1 : Enable DSP block clock 1 1 R/W SPK_CK_EN 1 : Enable SPK Protection block clock 1 0 R/W ANA_CK_EN 1 : Enable Analog block clock 1 0xF5 1 7:2 - Reserved - 6'h00 1 R/W SAFE_GUARD_CK_EN 1 : Enable SAFE Guard block clock 1 0 R/W CAL_CK_EN 1 : Enable Cal block clock 1 |
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