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TLA2024IRUGT Datasheet(PDF) 4 Page - Texas Instruments

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No. de pieza TLA2024IRUGT
Descripción Electrónicos  Cost-Optimized, Ultra-Small, 12-Bit, System-Monitoring ADCs
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI1 - Texas Instruments

TLA2024IRUGT Datasheet(HTML) 4 Page - Texas Instruments

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4
TLA2021, TLA2022, TLA2024
SBAS846 – NOVEMBER 2017
www.ti.com
Product Folder Links: TLA2021 TLA2022 TLA2024
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
7 Specifications
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.1 Absolute Maximum Ratings
(1)
MIN
MAX
UNIT
Power-supply voltage
VDD to GND
–0.3
7
V
Analog input voltage
AIN0, AIN1, AIN2, AIN3
GND – 0.3
VDD + 0.3
Digital input voltage
SDA, SCL, ADDR
GND – 0.3
7
Input current
Continuous, any pin except power-supply pins
–10
10
mA
Temperature
Junction, TJ
–40
125
°C
Storage, Tstg
–60
125
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.2 ESD Ratings
VALUE
UNIT
V(ESD)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
±2000
V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
±500
(1)
AINP and AINN denote the selected positive and negative inputs. On the TLA2024, AINx denotes one of the four available analog inputs.
(2)
This parameter expresses the full-scale range of the ADC scaling. No more than VDD + 0.3 V or 5.5 V (whichever is smaller) must be
applied to this device. See the Full-Scale Range (FSR) and LSB Size section more information.
7.3 Recommended Operating Conditions
over operating ambient temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
POWER SUPPLY
VDD to GND
2
5.5
V
ANALOG INPUTS(1)
FSR
Full-scale input voltage range(2)
(VIN = VAINP – VAINN)
±0.256
±6.144
V
V(AINx)
Absolute input voltage
GND
VDD
V
DIGITAL INPUTS
Digital input voltage
GND
5.5
V
TEMPERATURE
TA
Operating ambient temperature
–40
85
°C
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
7.4 Thermal Information
THERMAL METRIC(1)
TLA202x
UNIT
RUG (X2QFN)
10 PINS
RθJA
Junction-to-ambient thermal resistance
245.2
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
69.3
°C/W
RθJB
Junction-to-board thermal resistance
172.0
°C/W
ψJT
Junction-to-top characterization parameter
8.2
°C/W
ψJB
Junction-to-board characterization parameter
170.8
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
°C/W


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