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CD74HCT257 Datasheet(PDF) 1 Page - Texas Instruments |
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CD74HCT257 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 12 page 1 Data sheet acquired from Harris Semiconductor SCHS171D Features • Buffered Inputs • Typical Propagation Delay ( In to Output ) = 12ns at VCC = 5V, CL = 15pF, TA = 25 oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55oC to 125oC • Balanced Propagation Delay and Transition Times • Significant Power Reduction Compared to LSTTL Logic ICs • HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V • HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH Description The ’HC257 and ’HCT257 are quad 2-input multiplexers which select four bits of data from two sources under the control of a common Select Input (S). The Output Enable input (OE) is active LOW. When OE is HIGH, all of the out- puts (1Y-4Y) are in the high impedance state regardless of all other input conditions. Moving data from two groups of registers to four common output buses is a common use of the 257. The state of the Select input determines the particular register from which the data comes. It can also be used as a function generator. Pinout CD54HC257, CD54HCT257 (CERDIP) CD74HC257, CD74HCT257 (PDIP, SOIC) TOP VIEW Ordering Information PART NUMBER TEMP. RANGE (oC) PACKAGE CD54HC257F3A -55 to 125 16 Ld CERDIP CD54HCT257F3A -55 to 125 16 Ld CERDIP CD74HC257E -55 to 125 16 Ld PDIP CD74HC257M -55 to 125 16 Ld SOIC CD74HC257MT -55 to 125 16 Ld SOIC CD74HC257M96 -55 to 125 16 Ld SOIC CD74HCT257E -55 to 125 16 Ld PDIP CD74HCT257M -55 to 125 16 Ld SOIC CD74HCT257MT -55 to 125 16 Ld SOIC CD74HCT257M96 -55 to 125 16 Ld SOIC NOTE: When ordering, use the entire part number. The suffix 96 denotes tape and reel. The suffix T denotes a small-quantity reel of 250. 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 S 1I0 1I1 1Y 2I0 2I1 GND 2Y VCC 4I0 4I1 4Y 3I0 3I1 3Y OE November 1997 - Revised October 2003 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © 2003, Texas Instruments Incorporated CD54HC257, CD74HC257, CD54HCT257, CD74HCT257 High-Speed CMOS Logic Quad 2-Input Multiplexer with Three-State Non-Inverting Outputs [ /Title (CD74 HC257 , CD74 HCT25 7) /Sub- ject (High Speed CMOS Logic Quad 2-Input Multi- plexer |
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