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ATWILC3000 Datasheet(PDF) 27 Page - ATMEL Corporation

No. de pieza ATWILC3000
Descripción Electrónicos  Single Chip IEEE 802.11 b/g/n Link Controller withIntegrated Bluetooth 4.0
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Fabricante Electrónico  ATMEL [ATMEL Corporation]
Página de inicio  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATWILC3000 Datasheet(HTML) 27 Page - ATMEL Corporation

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ATWILC3000 Single Chip IEEE 802.11 b/g/n Link Controller with
Integrated Bluetooth 4.0 [DATASHEET]
Atmel-42390D-ATWILC3000-MUT-SmartConnect-Datasheet_05/2016
2
7
27
9.5
SDIO Slave Interface
The ATWILC3000 SDIO Slave is a full speed interface. The interface supports the 1-bit/4-bit SD transfer mode
at the clock range of 0-50MHz. The Host can use this interface to read and write from any register within the
chip as well as configure the ATWILC3000 for data DMA. To use this interface, pin 12 (SDIO_SPI_CFG) must
be grounded. The SDIO Slave pins are mapped as shown in Table 9-9.
Table 9-9.
SDIO Interface Pin Mapping
Pin #
SPI Function
12
CFG: Must be tied to ground
35
DAT3: Data 3
34
DAT2: Data 2
32
DAT1: Data 1
31
DAT0: Data 0
30
CMD: Command
29
CLK: Clock
When the SDIO card is inserted into an SDIO aware host, the detection of the card will be via the means
described in SDIO specification. During the normal initialization and interrogation of the card by the host, the
card will identify itself as an SDIO device. The host software will obtain the card information in a tuple (linked
list) format and determine if that card’s I/O function(s) are acceptable to activate. If the card is acceptable, it will
be allowed to power up fully and start the I/O function(s) built into it.
The SD memory card communication is based on an advanced 9-pin interface (Clock, Command, and four
data and three power lines) designed to operate at maximum operating frequency of 50MHz.
The SDIO Slave interface has the following features:
Meets SDIO card specification version 2.0
Host clock rate variable between 0 and 50MHz
1 bit/4-bit SD bus modes supported
Allows card to interrupt host
Responds to Direct read/write (IO52) and Extended read/write (IO53) transactions
Supports Suspend/Resume operation
The SDIO Slave interface timing is provided in Figure 9-6 and Table 9-10.


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