≤ T

A

≤ 75 ˚C unless otherwise

noted.) (Continued)

Symbol

Parameter

Condition

Min

Typ

Max

Units

RF2 VCO FOR PDC800

Spurious Tones

@

≤ 25 kHz offset

-45

dBc

≤ 50 kHz

-60

dBc

≤ 100 kHz

-69

dBc

-75

dBc

DIGITAL INTERFACE (DATA, CLK, LE, LD, CE, BS)

V

IH

High-Level Input Voltage

0.8 V

CC

V

CC

V

0.8 V

DD

V

DD

V

V

IL

Low-Level Input Voltage

-0.3

0.2 V

CC

V

-0.3

0.2 V

DD

V

I

IH

High-Level Input Current

-10

10

µA

I

IL

Low-Level Input Current

-10

10

µA

Input Capacitance

3

pF

Rise/Fall Time

30

ns

V

OH

High-Level Output Voltage

V

V

V

V

V

OL

Low-Level Output Voltage

0.4

V

Output Capacitance

5pF

MICROWIRE INTERFACE TIMING

t

CS

Data to Clock Set Up Time

50

ns

t

CH

Data to Clock Hold Time

10

ns

t

CWH

Clock Pulse Width HIGH

50

ns

t

CWL

Clock Pulse Width LOW

50

ns

t

DS

Latch Enable LOW to Data Set Up

Time

50

ns

t

ES

Clock to Latch Enable Set Up Time

50

ns

t

EW

Latch Enable Pulse Width

50

ns

Note 5: RF PLL and VCO in PDC800 mode.

Note 6: RF PLL and VCO in PDC1500 mode.

Note 7: The reference frequency must be programmed using the OSC_FREQ control bit. For other reference frequencies, please contact National Semiconductor.

Note 8: For other frequency ranges, please contact National Semiconductor.

Note 9: Lock time is defined as the time difference between the beginning of the frequency transition and the point at which the frequency remains within +/-1 kHz

of the final frequency.

Note 10: Lock time is defined as the time difference between the beginning of the frequency transition and the point at which the frequency remains within +/-3 kHz

of the final frequency.

Note 11: Lock time specification also applies to power up with MICROWIRE serial interface.

Statistical Quality Control (SQC) methods. All hot and cold limits are guaranteed by correlating the electrical characteristics to process and temperature variations

and applying statistical process control.

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