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LMZM23600

SNVSB53 – FEBRUARY 2018

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Copyright © 2018, Texas Instruments Incorporated

Feature Description (continued)

8.3.7.4 SYNC Operation

It is often desirable to synchronize the switching frequency of multiple regulators in a single system. This

technique results in better defined EMI behavior and can reduce the need for capacitance on some power rails.

The LMZM23600 MODE/SYNC input allows synchronization to an external clock. The LMZM23600 implements

an in-phase locking scheme – the rising edge of the clock signal provided to the input of the LMZM23600 device

corresponds to turning on the high-side MOSFET device. This function is implemented using phase locking over

a limited frequency range eliminating large glitches upon initial application of an external clock. The clock fed into

the LMZM23600 device replaces the internal free-running clock but does not affect frequency foldback operation.

The output voltage continues to be well regulated using frequency reduction when duty factors outside of the

normal duty cycle range are reached.

The device remains in FPWM mode and operates in CCM for light loads when synchronization input is provided.

The MODE/SYNC function logic always prioritizes the proper regulation of the output voltage. Table 2

summarizes the MODE/SYNC function and the operating switching frequency with various conditions.

Table 2. Switching Frequency and MODE/SYNC Function

DEVICE

SWITCHING FREQUENCY

MODE/SYNC

LIGHT LOAD

FULL LOAD

VIN > 28 V

IN DROPOUT MODE

ADJ Output

Logic LOW = Auto PFM

Reduced

(save power)

Fixed

1000 kHz

Reduced

(maintain regulation)

Reduced

(maintain regulation)

Logic HIGH = FPWM

Fixed

1000 kHz

Fixed

1000 kHz

Reduced

(maintain regulation)

Reduced

(maintain regulation)

Reduced

(maintain regulation)

Reduced

(maintain regulation)

Fixed

3.3-V

Output

or 5-V

Output

Logic LOW = Auto PFM

Reduced

(save power)

Fixed

750 kHz

Fixed

750 kHz

Reduced

(maintain regulation)

Logic HIGH = FPWM

Fixed

750 kHz

Fixed

750 kHz

Fixed

750 kHz

Reduced

(maintain regulation)

Reduced

(maintain regulation)

8.3.8 Thermal Protection

threshold for the junction is typically 155°C. Both, high-side and low-side power MOSFETs are turned off until the

junction temperature has decreased under the hysteresis level, typically 15°C below the shutdown temperature.